ACS8515 LC/P
Line Card Protection Switch
for SONET or SDH Network Elements
FINAL
ADVANCED COMMUNCIATIONS
Description
Features
The ACS8515 is a highly integrated, single-chip Suitable for Stratum 3, 4E and 4 SONET
solution for hit-less protection switching of SEC or SDH Equipment Clock (SEC) applications
clocks from Master and Slave SETS clockcards Meets AT&T, ITU-T, ETSI and Telcordia
in a SONET or SDH Network Element. The specifications
ACS8515 has fast activity monitors on the in- Three SEC input clocks, from 2 kHz to 155.52
puts and will implement automatic system pro- MHz
tection switching against master clock failure. A Generates two SEC output clocks, up to 311.04
further input is provided for an optional standby MHz
SEC clock. The ACS8515 is fully compliant with Frequency translation of SEC input clock to a
the required specifications and standards.
different local line card clock
Robust input clock source frequency and
activity monitoring on all inputs
The ACS8515 can perform frequency translation
from a SEC input clock distributed along a back Supports Free-Run, Locked and Holdover
plane to a different local line card clock, e.g. 8 modes of operation
kHz distributed on the back plane and 19.44 MHz Automatic hit-less source switchover on loss
generated on the line cards.
of input
External force fast switch between SEC inputs
An SPI serial port is incorporated, providing ac- Phase build-out for output clock phase
cess to the configuration and status registers for
device setup.
continuity during input switchover
SPI compatible serial microprocessor interface
Programmable wander and jitter tracking/
attenuation 0.1 Hz to 20 Hz
The ACS8515 can utilise either a low cost XO
oscillator module, or a TCXO with full tempera- Single 3.3 v operation. 5 v I/O compatible
ture calibration - as required by the application. Operating temperature (ambient) -40°C to
+85°C
Available in 64 pin LQFP package
Block Diagram
3 x SEC Input
Master/Slave
+ Standby:
N x 8kHz
1.544MHz
2.048MHz
6.48M Hz
19.44MHz
38.88MHz
51.84MHz
77.76MHz
155.52MHz
Plus:
2 x SEC Output
including:
3xSEC
2xSEC
1.544/2.048MHz
3.088/4.096MHz
6.176/8.192MHz
12.352/16.384MHz
19.44MHz
Input
Ports
Output
Ports
APLL
DPLL
Frequency Synthesis
Monitors
Frequency
Dividers
38.88MHz
155.52MHz
311.04MHz
Plus:
2kHz MFrSync
8kHz FrSync
FrSync
MFrSync
MFrSync
MFrSync
Chip Clock
Generator
Priority
Table
Register
Set
SPI Compatible Serial
Microprocessor Port
TCXO or XO
Revision 2.05/Jan 2001 ã2001 Semtech Corp
www.semtech.com