Datasheet > 存储 > SRAM> CY14B512I

CY14B512I

更新时间： 2024-02-13 01:18:32

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		静态存储器时钟
页数	文件大小	规格书
41页	1809K
描述
512-Kbit (64 K x 8) Serial (I2C) nvSRAM with Real Time Clock

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CY14B512I 技术参数

是否Rohs认证：	符合	生命周期：	Active
零件包装代码：	SOIC	包装说明：	SOP, SOP16,.4
针数：	16	Reach Compliance Code：	compliant
风险等级：	5.78	JESD-30 代码：	R-PDSO-G16
JESD-609代码：	e3	长度：	10.285 mm
内存密度：	524288 bit	内存集成电路类型：	NON-VOLATILE SRAM
内存宽度：	8	湿度敏感等级：	3
功能数量：	1	端子数量：	16
字数：	65536 words	字数代码：	64000
工作模式：	SYNCHRONOUS	最高工作温度：	85 °C
最低工作温度：	-40 °C	组织：	64KX8
封装主体材料：	PLASTIC/EPOXY	封装代码：	SOP
封装等效代码：	SOP16,.4	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	并行/串行：	SERIAL
峰值回流温度（摄氏度）：	260	电源：	3/3.3 V
认证状态：	Not Qualified	座面最大高度：	2.667 mm
最大待机电流：	0.005 A	子类别：	SRAMs
最大压摆率：	0.01 mA	最大供电电压 (Vsup)：	3.6 V
最小供电电压 (Vsup)：	2.7 V	标称供电电压 (Vsup)：	3 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	MATTE TIN
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	40
宽度：	7.4925 mm	Base Number Matches：	1

CY14B512I 数据手册

CY14C512I

CY14B512I, CY14E512I

512-Kbit (64 K × 8) Serial (I²C) nvSRAM

with Real Time Clock

512-Kbit (64

K × 8) Serial (I²C) nvSRAM with Real Time Clock

■ I²C access to special functions

❐ Nonvolatile STORE/RECALL

❐ 8-byte serial number

❐ Manufacturer ID and Product ID

❐ Sleep mode

Features

■ 512-Kbit nonvolatile static random access memory (nvSRAM)

❐ Internally organized as 64 K × 8

❐ STORE to QuantumTrap nonvolatile elements initiated

automatically on power-down (AutoStore) or by using I²C

command (Software STORE) orHSB pin (Hardware STORE)

■ Low power consumption

❐ Average active current of 1 mA at 3.4 MHz operation

❐ Average standby mode current of 250 µA

❐ Sleep mode current of 8 µA

❐ RECALL to SRAM initiated on power-up (Power-Up

RECALL) or by I²C command (Software RECALL)

❐ Automatic STORE on power-down with a small capacitor

■ Industry standard configurations

❐ Operating voltages:

• CY14C512I : V_CC= 2.4 V to 2.6 V

• CY14B512I : V_CC= 2.7 V to 3.6 V

• CY14E512I : V_CC= 4.5 V to 5.5 V

❐ Industrial temperature

■ High reliability

❐ Infinite read, write, and RECALL cycles

❐ 1 million STORE cycles to QuantumTrap

❐ Data retention: 20 years at 85 C

■ Real Time Clock (RTC)

❐ Full-featured RTC

❐ Watchdog timer

❐ Clock alarm with programmable interrupts

❐ Backup power fail indication

❐ 16-pin small outline integrated circuit (SOIC) package

❐ Restriction of hazardous substances (RoHS) compliant

Overview

❐ Square wave output with programmable frequency (1 Hz,

512 Hz, 4096 Hz, 32.768 kHz)

The Cypress CY14C512I/CY14B512I/CY14E512I combines a

512-Kbit nvSRAM^[1]with a full-featured RTC in a monolithic

integrated circuit with serial I²C interface. The memory is

organized as 64 K words of 8 bits each. The embedded

nonvolatile elements incorporate the QuantumTrap technology,

creating the world’s most reliable nonvolatile memory. The

SRAM provides infinite read and write cycles, while the

QuantumTrap cells provide highly reliable nonvolatile storage of

data. Data transfers from SRAM to the nonvolatile elements

(STORE operation) takes place automatically at power-down.

On power-up, data is restored to the SRAM from the nonvolatile

memory (RECALL operation). The STORE and RECALL

operations can also be initiated by the user through I²C

commands.

❐ Capacitor or battery backup for RTC

❐ Backup current of 0.45 µA (typical)

■ High-speed I²C interface

❐ Industry standard 100 kHz and 400 kHz speed

❐ Fast mode Plus 1 MHz speed

❐ High speed 3.4 MHz

❐ Zero cycle delay reads and writes

■ Write protection

❐ Hardware protection using Write Protect (WP) pin

❐ Software block protection for one-quarter, one-half, or entire

array

Logic Block Diagram

Serial Number

8 x 8

V_RTCcap

V_CCV_CAP

V_RTCbat

Manufacture ID/

Product ID

Power Control

Block

Memory Control Register

Command Register

Quantrum Trap

64 K x 8

Sleep

STORE

SRAM

64 K x 8

Control Registers Slave

SDA

SCL

A2, A1, A0

I²C Control Logic

Slave Address

Decoder

Memory

Address and Data

Control

RECALL

Memory Slave

RTC Slave

X_in

RTC Control Logic

INT/SQW

X_out

Registers

Counters

Note

1. Serial (I C) nvSRAM will be referred to as nvSRAM throughout the datasheet.

Cypress Semiconductor Corporation

Document #: 001-64879 Rev. *B

•

198 Champion Court

•

San Jose, CA 95134-1709

•

408-943-2600

Revised May 4, 2011

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与CY14B512I相关器件

型号	品牌	描述	获取价格	数据表
CY14B512I-SFXI	CYPRESS	512-Kbit (64 K x 8) Serial (I2C) nvSRAM with Real Time Clock	获取价格
CY14B512I-SFXIT	CYPRESS	512-Kbit (64 K x 8) Serial (I2C) nvSRAM with Real Time Clock	获取价格
CY14B512J	CYPRESS	512-Kbit (64 K x 8) Serial (I2C) nvSRAM Infinite read, write, and RECALL cycles	获取价格
CY14B512J2-SXI	CYPRESS	512-Kbit (64 K x 8) Serial (I2C) nvSRAM Infinite read, write, and RECALL cycles	获取价格
CY14B512J2-SXIT	CYPRESS	512-Kbit (64 K x 8) Serial (I2C) nvSRAM Infinite read, write, and RECALL cycles	获取价格
CY14B512P	CYPRESS	512-Kbit (64 K × 8) Serial (SPI) nvSRAM with	获取价格

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