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CY14B512Q2A-SXIT

更新时间： 2024-11-23 09:41:07
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 存储内存集成电路静态存储器光电二极管
页数 文件大小 规格书
33页 1530K
描述
512-Kbit (64 K x 8) SPI nvSRAM Infinite read, write, and RECALL cycles

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CY14B512Q2A-SXIT 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SOIC
包装说明：0.150 INCH, ROHS COMPLIANT, MS-012, SOIC-8针数：8
Reach Compliance Code：compliantECCN代码：3A991.B.2.A
HTS代码：8542.32.00.41风险等级：5.78
Is Samacsys：NJESD-30 代码：R-PDSO-G8
JESD-609代码：e4长度：4.889 mm
内存密度：524288 bit内存集成电路类型：NON-VOLATILE SRAM
内存宽度：8湿度敏感等级：3
功能数量：1端子数量：8
字数：65536 words字数代码：64000
工作模式：SYNCHRONOUS最高工作温度：85 °C
最低工作温度：-40 °C组织：64KX8
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP8,.25封装形状：RECTANGULAR
封装形式：SMALL OUTLINE并行/串行：SERIAL
峰值回流温度（摄氏度）：260电源：3/3.3 V
认证状态：Not Qualified座面最大高度：1.727 mm
最大待机电流：0.00015 A子类别：SRAMs
最大压摆率：0.01 mA最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：2.7 V标称供电电压 (Vsup)：3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：NICKEL PALLADIUM GOLD
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：20
宽度：3.8985 mmBase Number Matches：1

CY14B512Q2A-SXIT 数据手册

 浏览型号CY14B512Q2A-SXIT的Datasheet PDF文件第2页浏览型号CY14B512Q2A-SXIT的Datasheet PDF文件第3页浏览型号CY14B512Q2A-SXIT的Datasheet PDF文件第4页浏览型号CY14B512Q2A-SXIT的Datasheet PDF文件第5页浏览型号CY14B512Q2A-SXIT的Datasheet PDF文件第6页浏览型号CY14B512Q2A-SXIT的Datasheet PDF文件第7页 
CY14C512Q  
CY14B512Q  
CY14E512Q  
512-Kbit (64 K × 8) SPI nvSRAM  
512-Kbit (64  
K × 8) SPI nvSRAM  
■ Industry standard configurations  
❐ Operating voltages:  
Features  
■ 512-Kbit nonvolatile static random access memory (nvSRAM)  
• CY14C512Q: VCC = 2.4 V to 2.6 V  
• CY14B512Q: VCC = 2.7 V to 3.6 V  
• CY14E512Q: VCC = 4.5 V to 5.5 V  
❐ Industrial temperature  
❐ 8- and 16-pin small outline integrated circuit (SOIC) package  
❐ Restriction of hazardous substances (RoHS) compliant  
internally organized as 64 K × 8  
❐ STORE to QuantumTrap nonvolatile elements initiated  
automatically on power-down (AutoStore) or by using SPI  
instruction (Software STORE) or HSB pin (Hardware  
STORE)  
❐ RECALL to SRAM initiated on power-up (Power-Up  
RECALL) or by SPI instruction (Software RECALL)  
Functional Overview  
❐ Support automatic STORE on power-down with a small  
capacitor (except for CY14X512Q1A)  
The Cypress CY14X512Q combines a 512-Kbit nvSRAM[1] with  
a nonvolatile element in each memory cell with serial SPI  
interface. The memory is organized as 64 K words of 8 bits each.  
The embedded nonvolatile elements incorporate the  
QuantumTrap technology, creating the world’s most reliable  
nonvolatile memory. The SRAM provides infinite read and write  
cycles, while the QuantumTrap cells provide highly reliable  
nonvolatile storage of data. Data transfers from SRAM to the  
nonvolatile elements (STORE operation) takes place  
automatically at power-down (except for CY14X512Q1A). On  
power-up, data is restored to the SRAM from the nonvolatile  
memory (RECALL operation). You can also initiate the STORE  
and RECALL operations through SPI instruction.  
■ High reliability  
❐ Infinite read, write, and RECALL cycles  
❐ 1million STORE cycles to QuantumTrap  
❐ Data retention: 20 years at 85 C  
■ 40-MHz, and 104-MHz High-speed serial peripheral interface  
(SPI)  
❐ 40-MHz clock rate SPI write and read with zero cycle delay  
❐ 104-MHz clock rate SPI write and SPI read (with special fast  
read instructions)  
❐ Supports SPI mode 0 (0,0) and mode 3 (1,1)  
■ SPI access to special functions  
❐ Nonvolatile STORE/RECALL  
❐ 8-byte serial number  
Configuration  
Feature  
CY14X512Q1A CY14X512Q2A CY14X512Q3A  
❐ Manufacturer ID and Product ID  
❐ Sleep mode  
AutoStore  
No  
Yes  
Yes  
Yes  
Yes  
■ Write protection  
Software  
STORE  
Yes  
❐ Hardware protection using Write Protect (WP) pin  
❐ Software protection using Write Disable instruction  
❐ Software block protection for 1/4, 1/2, or entire array  
Hardware  
STORE  
No  
No  
Yes  
■ Low power consumption  
❐ Average active current of 3 mA at 40 MHz operation  
❐ Average standby mode current of 150 A  
❐ Sleep mode current of 8 A  
Logic Block Diagram  
VCC VCAP  
Serial Number  
8 x 8  
Power Control  
Block  
Manufacture ID/  
Product ID  
QuantrumTrap  
64 K x 8  
SLEEP  
STORE  
SRAM  
64 K x 8  
RDSN/WRSN/RDID  
READ/WRITE  
STORE/RECALL/ASENB/ASDISB  
SI  
CS  
Memory  
Data &  
Address  
Control  
RECALL  
SPI Control Logic  
Write Protection  
Instruction decoder  
SCK  
WP  
SO  
WRSR/RDSR/WREN  
Status Register  
Note  
1. This device will be referred to as nvSRAM throughout the document.  
Cypress Semiconductor Corporation  
Document #: 001-65267 Rev. *B  
•
198 Champion Court  
•
San Jose, CA 95134-1709  
•
408-943-2600  
Revised May 5, 2011  
[+] Feedback  
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中文翻译

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CY14B512Q2A-SXIT 替代型号

型号 品牌 替代类型 描述 数据表
CY14B512Q2A-SXI CYPRESS

完全替代

 512-Kbit (64 K x 8) SPI nvSRAM Infinite read, write, and RECALL cycles
CY14B512J2-SXI CYPRESS

完全替代

 512-Kbit (64 K x 8) Serial (I2C) nvSRAM Infinite read, write, and RECALL cycles

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