Datasheet > 935320428557

935320428557

更新时间： 2024-11-08 15:46:31

品牌	Logo	应用领域
恩智浦 - NXP		外围集成电路
页数	文件大小	规格书
35页	511K
描述
Microprocessor

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技术参数
数据手册

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935320428557 技术参数

生命周期：	Active	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.6
uPs/uCs/外围集成电路类型：	MICROPROCESSOR	Base Number Matches：	1

935320428557 数据手册

Document Number S9S08RN16DS

Rev 1, 02/2014

Freescale Semiconductor

Data Sheet: Technical Data

S9S08RN16DS

S9S08RN16 Series Data

Sheet

Supports: S9S08RN16 and S9S08RN8

Key features

• Development support

– Single-wire background debug interface

– Breakpoint capability to allow three breakpoints

setting during in-circuit debugging

– On-chip in-circuit emulator (ICE) debug module

containing two comparators and nine trigger

modes

• 8-Bit S08 central processor unit (CPU)

– Up to 20 MHz bus at 2.7 V to 5.5 V across

temperature range of -40 °C to 125 °C

– Supporting up to 40 interrupt/reset sources

– Supporting up to four-level nested interrupt

– On-chip memory

– Up to 16 KB flash read/program/erase over full

operating voltage and temperature

– Up to 256 byte EEPROM with ECC; 2-byte

erase sector; EEPROM program and erase

while executing code from flash

– Up to 2048 byte random-access memory (RAM)

– Flash and RAM access protection

• Power-saving modes

– One low-power stop mode; reduced power wait

mode

– Peripheral clock enable register can disable

clocks to unused modules, reducing currents;

allows clocks to remain enabled to specific

peripherals in stop3 mode

• Clocks

– Oscillator (XOSC) - loop-controlled Pierce

oscillator; crystal or ceramic resonator

– Internal clock source (ICS) - containing a

frequency-locked-loop (FLL) controlled by

internal or external reference; precision

trimming of internal reference allowing 1%

deviation across temperature range of 0 °C to

70 °C and -40 °C to 85 °C, 1.5% deviation

across temperature range of -40 °C to 105 °C,

and 2% deviation across temperature range of

-40 °C to 125 °C; up to 20 MHz

• System protection

– Watchdog with independent clock source

– Low-voltage detection with reset or interrupt;

selectable trip points

– Illegal opcode detection with reset

– Illegal address detection with reset

Freescale reserves the right to change the detail specifications as may be

required to permit improvements in the design of its products.

12 3 4 5 6 7...35

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