Datasheet > 935318925557

935318925557

更新时间： 2024-09-20 21:17:39

品牌	Logo	应用领域
恩智浦 - NXP		外围集成电路
页数	文件大小	规格书
237页	2210K
描述
RISC Microprocessor

阅读下载

中文翻译

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

935318925557 技术参数

生命周期：	Active	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.76
uPs/uCs/外围集成电路类型：	MICROPROCESSOR, RISC	Base Number Matches：	1

935318925557 数据手册

Document Number T4240

Rev. 1, 05/2016

NXP Semiconductors

Data Sheet: Technical Data

T4240

QorIQ T4240 Data Sheet

Features

• 32 SerDes lanes at up to 10 Gb/s

• 12 e6500 cores built on Power Architecture®

technology and arranged as clusters of four e6500

cores sharing a 2 MB L2 cache

• Ethernet interfaces

– Up to four 10 Gbps Ethernet MACs

– Up to sixteen 1 Gbps Ethernet MACs

– Combinations of 1 Gbps and 10 Gbps Ethernet

MACs

• 1.5 MB CoreNet platform cache (CPC)

• Hierarchical interconnect fabric

– IEEE Std 1588™ support

– CoreNet fabric supporting coherent and non-

coherent transactions with prioritization and

bandwidth allocation amongst CoreNet end-points

– 1.6 Tbps coherent read bandwidth

• High-speed peripheral interfaces

– Four PCI Express 2.0/3.0 controllers running at up

to 8 GT/s with one controllers supporting end-point,

single-root I/O virtualization (SR-IOV)

– Two Serial RapidIO 2.0 controllers running at up to

5 Gbaud

• Three 64-bit DDR3 SDRAM memory controllers

– DDR3 and DDR3L with ECC and interleaving

support

– Interlaken look-aside interface for TCAM

connection

• Data Path Acceleration Architecture (DPAA)

incorporating acceleration for the following functions:

– Packet parsing, classification, and distribution

(Frame Manager 1.1)

• Additional peripheral interfaces

– Two Serial ATA (SATA 2.0) controllers

– Two high-speed USB 2.0 controllers with integrated

PHY

– Queue management for scheduling, packet

sequencing, and congestion management (Queue

Manager 1.1)

– Enhanced secure digital host controller (SD/MMC/

eMMC)

– Hardware buffer management for buffer allocation

and de-allocation (Buffer Manager 1.1)

– Cryptography Acceleration (SEC 5.0)

– RegEx Pattern Matching Acceleration (PME 2.0)

– Decompression/Compression Acceleration (DCE

1.0)

– Enhanced Serial peripheral interface (eSPI)

– Four I2C controllers

– Four 2-pin UARTs or two 4-pin DUARTs

– Integrated flash controller supporting NAND and

NOR flash

• Three 8-channel DMA engines

– DPAA chip-to-chip interconnect via RapidIO

Message Manager (RMan 1.0)

• 1932 FC-PBGA package, 45 mm x 45 mm, 1mm pitch

NXP reserves the right to change the production detail specifications as may be

required to permit improvements in the design of its products.

12 3 4 5 6 7...237

中文翻译

下载PDF

与935318925557相关器件

型号	品牌	获取价格	描述	数据表
935318943518	NXP	获取价格	RISC Microcontroller
935318944557	NXP	获取价格	RISC Microprocessor
935318945557	NXP	获取价格	RISC Microprocessor
935318949557	NXP	获取价格	Microcontroller
935318954528	NXP	获取价格	RF and Baseband Circuit
935318954557	NXP	获取价格	RF and Baseband Circuit
935318962174	NXP	获取价格	Microcontroller
935318968557	NXP	获取价格	Microcontroller
935318969574	NXP	获取价格	Microcontroller
935318971518	NXP	获取价格	Microcontroller

与935318925557相关文章

摩尔斯微电子在美国约书亚树国家公园测试 Wi-Fi HaLow
2024-09-18

30
贸泽上架Tallysman TW5386智能GNSS天线
2024-09-18

28
SL74HC10N：高性能三输入与非门解析
2024-09-03

100
AIC1781A 电池充电控制器深度解析
2024-09-03

96

产品中心

服务支持

精选活动

关于我们

帮助中心

935318925557

935318925557 技术参数

935318925557 数据手册

与935318925557相关器件

与935318925557相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

935318925557

935318925557 技术参数

935318925557 数据手册

与935318925557相关器件

与935318925557相关文章

您还可以找

您在本页遇到什么问题？