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889832AK PDF预览

889832AK

更新时间: 2024-11-12 10:09:39
品牌 Logo 应用领域
艾迪悌 - IDT 驱动逻辑集成电路
页数 文件大小 规格书
17页 354K
描述
Low Skew Clock Driver, 889832 Series, 4 True Output(s), 0 Inverted Output(s), 3 X 3 MM, 0.95 MM PITCH, MO-220, VFQFN-16

889832AK 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:QFN
包装说明:HVQCCN, LCC16,.12SQ,20针数:16
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.92系列:889832
输入调节:DIFFERENTIALJESD-30 代码:S-XQCC-N16
JESD-609代码:e0长度:3 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER功能数量:1
反相输出次数:端子数量:16
实输出次数:4最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装等效代码:LCC16,.12SQ,20
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):225电源:2.5 V
Prop。Delay @ Nom-Sup:0.51 ns传播延迟(tpd):0.51 ns
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.025 ns
座面最大高度:1 mm子类别:Clock Drivers
最大供电电压 (Vsup):2.625 V最小供电电压 (Vsup):2.375 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:TIN LEAD
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:3 mmBase Number Matches:1

889832AK 数据手册

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LOW SKEW, 1-TO-4 DIFFERENTIAL-TO-  
LVDS FANOUT BUFFER  
ICS889832  
GENERAL DESCRIPTION  
FEATURES  
The ICS889832 is a high speed 1-to-4 Differential-  
Four differential LVDS outputs  
ICS  
HiPerClockS™  
to-LVDS Fanout Buffer and is a member of the  
HiPerClockS™ family of high performance clock  
IN, nIN pair can accept the following differential input levels:  
LVPECL, LVDS, SSTL  
solutions from IDT. The ICS889832 is optimized  
for high speed and very low output skew, making  
50Ω internal input termination to VT  
Output frequency: >2GHz  
it suitable for use in demanding applications such as SONET,  
1 Gigabit and 10 Gigabit Ethernet, and Fibre Channel. The  
internally terminated differential input and VREF_AC pin allow  
other differential signal families such as LVPECL, LVDS, and  
SSTL to be easily interfaced to the input with minimal use of  
external components. The device also has an output enable  
pin which may be useful for system test and debug purposes.  
The ICS889832 is packaged in a small 3mm x 3mm 16-pin  
VFQFN package which makes it ideal for use in space-  
constrained applications.  
Output skew: 25ps (maximum)  
Part-to-part skew: 200ps (maximum)  
Additive phase jitter, RMS: <0.2ps (typical)  
Propagation delay: 510ps (maximum)  
2.5V operating supply  
-40°C to 85°C ambient operating temperature  
Available in both standard (RoHS 5) and lead-free (RoHS 6)  
packages  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
16 15 14 13  
Q1  
1
2
12 IN  
Q0  
nQ1  
11 VT  
nQ0  
Q2  
3
4
10 VREF_AC  
IN  
VT  
Q1  
nQ2  
9
nIN  
50Ω  
50Ω  
5
6
7
8
nQ1  
nIN  
Q2  
VREF_AC  
ICS889832  
nQ2  
16-Lead VFQFN  
EN  
D
Q
3mm x 3mm x 0.925 package body  
K Package  
Q3  
Top View  
nQ3  
IDT/ ICSLVDS FANOUT BUFFER  
1
ICS889832AK REV. A OCTOBER 21, 2008  

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