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889872AK PDF预览

889872AK

更新时间: 2024-11-11 20:09:51
品牌 Logo 应用领域
艾迪悌 - IDT 驱动逻辑集成电路
页数 文件大小 规格书
14页 1520K
描述
Low Skew Clock Driver, PQCC16

889872AK 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:ObsoleteReach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.92
JESD-30 代码:S-PQCC-N16JESD-609代码:e0
逻辑集成电路类型:LOW SKEW CLOCK DRIVER端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:QCCN
封装等效代码:LCC16,.12SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER峰值回流温度(摄氏度):225
电源:2.5 V认证状态:Not Qualified
子类别:Clock Drivers标称供电电压 (Vsup):2.5 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30Base Number Matches:1

889872AK 数据手册

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PRELIMINARY  
DIFFERENTIAL-TO-LVDS BUFFER/DIVIDER  
W/INTERNAL TERMINATION  
ICS889872  
General Description  
Features  
The ICS889872 is a high speed Differential-to-  
Three LVDS outputs  
S
IC  
LVDS Buffer/Divider w/Internal Termination and is a  
member of the HiPerClockSfamily of high  
performance clock solutions from IDT. The  
Frequency divide select options: ÷4, ÷6: >2GHz,  
HiPerClockS™  
÷8, ÷16: >1.6GHz  
IN, nIN input can accept the following differential input levels:  
ICS889872 has a selectable ÷2, ÷4, ÷8, ÷16 output  
LVPECL, LVDS, CML  
dividers. The clock input has internal termination resistors,  
allowing it to interface with several differential signal types while  
minimizing the number of required external components. The  
device is packaged in a small, 3mm x 3mm VFQFN package,  
making it ideal for use on space-constrained boards.  
Output frequency: >2GHz  
Cycle-to-cycle jitter: 1ps (typical)  
Total jitter: 10ps (typical)  
Output skew: 7ps (typical), QA/nQA outputs  
Part-to-part skew: 250ps (typical)  
Propagation Delay: 750ps (typical), QA/nQA outputs  
Full 2.5V supply mode  
-40°C to 85°C ambient operating temperature  
Available in both standard (RoHS 5) and lead-free (RoHS 6)  
packages  
Pin Assignment  
Block Diagram  
Enable  
16 15 14 13  
nRESET/  
FF  
1
2
3
QB0  
nQB0  
QB1  
12  
11  
10  
IN  
nDISABLE  
VT  
VREF_AC  
nIN  
Enable  
MUX  
QA  
nQB1  
4
9
5
6
7
8
nQA  
QB0  
IN  
50  
nQB0  
÷2, ÷4,  
÷8, ÷16  
VT  
50Ω  
ICS889872  
nIN  
QB1  
16-Lead VFQFN  
3mm x 3mm x 0.95mm package body  
VREF_AC  
S1  
nQB1  
K Package  
Top View  
Decoder  
S0  
The Preliminary Information presented herein represents a product in pre-production. The noted characteristics are based on initial product characterization and/or qualification.  
Integrated Device Technology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.  
IDT™ / ICS™ LVDS BUFFER/DIVIDER W/INTERNAL TERMINATION  
1
ICS889872AK REV. A AUGUST 22, 2007  

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