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889874AKLF PDF预览

889874AKLF

更新时间: 2024-11-11 19:54:43
品牌 Logo 应用领域
艾迪悌 - IDT 驱动逻辑集成电路
页数 文件大小 规格书
14页 156K
描述
Low Skew Clock Driver, 889874 Series, 2 True Output(s), 0 Inverted Output(s), 3 X 3 MM, 0.95 MM HEIGHT, ROHS COMPLIANT, MO-220, VFQFN-16

889874AKLF 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:QFN包装说明:3 X 3 MM, 0.95 MM HEIGHT, ROHS COMPLIANT, MO-220, VFQFN-16
针数:16Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.8
其他特性:ECL RANGE: -2.375V TO -3.465 V系列:889874
输入调节:DIFFERENTIALJESD-30 代码:S-XQCC-N16
JESD-609代码:e3长度:3 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER功能数量:1
反相输出次数:端子数量:16
实输出次数:2最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:UNSPECIFIED
封装代码:HVQCCN封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:1 mm
最大供电电压 (Vsup):3.63 V最小供电电压 (Vsup):2.375 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:MATTE TIN
端子形式:NO LEAD端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:3 mm最小 fmax:2000 MHz
Base Number Matches:1

889874AKLF 数据手册

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PRELIMINARY  
ICS889874  
Integrated  
Circuit  
Systems, Inc.  
1:2  
DIFFERENTIAL-TO-LVPECL BUFFER/DIVIDER  
GENERAL DESCRIPTION  
FEATURES  
The ICS889874 is a high speed 1:2 Differential- Two LVPECL outputs  
ICS  
to-LVPECL Buffer/Divider and is a member of  
the HiPerClockS™family of high performance  
clock solutions from ICS. The ICS889874 has  
a selectable ÷1, ÷2, ÷4, ÷8, ÷16 output divider,  
Frequency divide select options: ÷ 1, ÷ 2, ÷4, ÷8, ÷16  
HiPerClockS™  
IN, nIN input can accept the following differential input levels:  
LVPECL, LVDS, CML  
which allows the device to be used as either a 1:2 fanout  
buffer or frequency divider. The clock input has internal  
termination resistors, allowing it to interface with several  
differential signal types while minimizing the number of  
required external components. The device is packaged in  
a small, 3mm x 3mm VFQFN package, making it ideal for  
use on space-constrained boards.  
Output frequency: > 2.5GHz  
Output skew: 5ps (typical)  
Part-to-part skew: TBD  
Additive jitter, RMS: <0.03ps (design target)  
Supply voltage range:(LVPECL), 2.375V to 3.465V  
Supply voltage range: (ECL), -3.465V to -2.375V  
-40°C to 85°C ambient operating temperature  
Available in both standard and lead-free RoHS compliant  
packages  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
S2  
16 15 14 13  
Q0  
IN  
VT  
1
2
3
4
12  
nQ0  
11  
nRESET  
Enable  
Q1  
VREF_AC  
10  
9
FF  
nQ1  
nIN  
Q0  
5
6
7
8
Enable  
MUX  
0
nQ0  
1
Q1  
IN  
00 ÷2  
01 ÷4  
10 ÷8  
nQ1  
VT  
ICS889874  
16-LeadVFQFN  
11 ÷16  
nIN  
S0  
S1  
3mm x 3mm x 0.95 package body  
K Package  
Decoder  
Top View  
VREF_AC  
The Preliminary Information presented herein represents a product in prototyping or pre-production.The noted characteristics are based on initial  
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.  
889874AK  
www.icst.com/products/hiperclocks.html  
REV. A MARCH 20, 2006  
1

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