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844003AKI-02T PDF预览

844003AKI-02T

更新时间: 2024-11-04 14:47:15
品牌 Logo 应用领域
艾迪悌 - IDT 时钟外围集成电路晶体
页数 文件大小 规格书
16页 320K
描述
Clock Generator, 700MHz, 5 X 5 MM, 0.75 MM HEIGHT, MO-220, VFQFN-32

844003AKI-02T 技术参数

是否无铅:含铅是否Rohs认证:不符合
生命周期:Active零件包装代码:QFN
包装说明:HVQCCN,针数:32
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.32
Is Samacsys:NJESD-30 代码:S-XQCC-N32
JESD-609代码:e0长度:5 mm
端子数量:32最高工作温度:85 °C
最低工作温度:-40 °C最大输出时钟频率:700 MHz
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):225主时钟/晶体标称频率:25 MHz
认证状态:Not Qualified座面最大高度:1 mm
最大供电电压:3.63 V最小供电电压:2.97 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:5 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHERBase Number Matches:1

844003AKI-02T 数据手册

 浏览型号844003AKI-02T的Datasheet PDF文件第2页浏览型号844003AKI-02T的Datasheet PDF文件第3页浏览型号844003AKI-02T的Datasheet PDF文件第4页浏览型号844003AKI-02T的Datasheet PDF文件第5页浏览型号844003AKI-02T的Datasheet PDF文件第6页浏览型号844003AKI-02T的Datasheet PDF文件第7页 
PRELIMINARY  
FEMTOCLOCKS™ CRYSTAL-TO-LVDS  
FREQUENCY SYNTHESIZER  
ICS844003I-02  
GENERAL DESCRIPTION  
FEATURES  
• Three 3.3V LVDS outputs on two banks, Bank A with one  
LVDS pair and Bank B with two LVDS output pairs  
The ICS844003I-02 is a 3 differential output LVDS  
ICS  
HiPerClockS™  
Synthesizer designed to generate Ethernet and PCI  
Express™ reference clock frequencies and is a  
• Using a 31.25MHz, 26.041666, or 25MHz crystal, the two  
output banks can be independently set for 625MHz, 500MHz  
312.5MHz, 250MHz, 156.25MHz, 125MHz or 100MHz  
member of the HiPerClocks™ family of high  
performance clock solutions from IDT. Using a  
31.25MHz, 26.041666MHz, or 25MHz, 18pF parallel resonant  
crystal, the following frequencies can be generated based on the  
settings of 4 frequency select pins (DIV_SELA[1:0],  
DIV_SELB[1:0]): 625MHz, 500MHz, 312.5MHz, 250MHz,  
156.25MHz, 125MHz, and 100MHz.The 844003I-02 has 2 output  
banks, Bank A with one differential LVDS output pair and Bank B  
with two differential LVDS output pairs.  
• Selectable crystal oscillator interface or LVCMOS/LVTTL  
single-ended input  
• VCO range: 490MHz to 680MHz  
• RMS phase jitter @ 125MHz (1.875MHz - 20MHz):  
0.50ps (typical)  
• Full 3.3V supply mode  
The two banks have their own dedicated frequency select pins  
and can be independently set for the frequencies mentioned  
above.The ICS844003I-02 uses IDT’s 3rd generation low phase  
noise VCO technology and can achieve 1ps or lower typical  
rms phase jitter, easily meeting Ethernet jitter requirements.  
The ICS844003I-02 is packaged in a 32-pin VFQFN package.  
• -40°C to 85°C ambient operating temperature  
• Available in both standard (RoHS 5) and lead-free (RoHS 6)  
packages  
PIN ASSIGNMENT  
32 31 30 29 28 27 26 25  
QA0  
24  
23  
GND  
XTAL_IN  
XTAL_OUT  
XTAL_SEL  
VCO_SEL  
MR  
1
2
3
4
5
6
7
8
nQA0  
GND  
ICS844003I-02 22  
32-Lead VFQFN  
QB0  
nQB0  
QB1  
21  
5mm x 5mm x 0.75mm  
20  
package body  
K Package  
Top View  
19  
nQB1  
18  
GND  
nc  
BLOCK DIAGRAM  
VDDO_B  
17  
9
10 11 12 13 14 15 16  
Pullup  
OEA  
Pulldown:Pullup  
DIV_SELA[1:0]  
Pullup  
VCO_SEL  
QA0  
0 0 ÷1  
nQA0  
Pulldown  
0 1 ÷2 (default)  
1 0 ÷4  
REF_CLK  
XTAL_IN  
0
1
0
1
1 1 ÷5  
Phase  
Detector  
VCO  
490-680MHz  
OSC  
XTAL_OUT  
XTAL_SEL  
Pullup  
QB0  
FB_DIV  
0 0 ÷1  
nQB0  
0 1 ÷2 (default)  
1 0 ÷4  
0 = ÷20 (default)  
1 = ÷24  
QB1  
1 1 ÷5  
Pulldown  
nQB1  
FB_DIV  
DIV_SELB[1:0]  
MR  
Pulldown:Pullup  
Pulldown  
Pullup  
OEB  
The Preliminary Information presented herein represents a product in pre-production.The noted characteristics are based on initial product characterization  
and/or qualification.Integrated DeviceTechnology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.  
IDT/ ICSLVDS FREQUENCY SYNTHESIZER  
1
ICS844003AKI-02 REV. A FEBRUARY 22, 2007  

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