FEMTOCLOCKS™ CRYSTAL-TO-LVDS
FREQUENCY SYNTHESIZER
ICS844003-01
General Description
Features
The ICS844003-01 is a 3 differential output LVDS
• Three differential LVDS output pairs on two banks, Bank A with
one LVDS pair and Bank B with two LVDS output pairs
S
IC
Synthesizer designed to generate Ethernet refer-
ence clock frequencies and is a member of the
HiPerClocks™ family of high performance clock
solutions from IDT. Using a 19.53125MHz or
HiPerClockS™
• Using a 19.53125MHz or 25MHz crystal, the two output banks
can be independently set for 625MHz, 312.5MHz, 156.25MHz
or 125MHz
25MHz, 18pF parallel resonant crystal, the following frequencies
can be generated based on the settings of 4 frequency select pins
(DIV_SELA[1:0], DIV_SELB[1:0]): 625MHz, 312.5MHz,
156.25MHz, and 125MHz. The ICS844003-01 has 2 output banks,
Bank A with 1 differential LVDS output pair and Bank B with 2
differential LVDS output pairs.
• Selectable crystal oscillator interface or LVCMOS/LVTTL
single-ended input
• VCO range: 490MHz - 680MHz
• RMS phase jitter @ 156.25MHz (1.875MHz – 20MHz):
0.56ps (typical)
• Full 3.3V supply mode
The two banks have their own dedicated frequency select pins and
can be independently set for the frequencies mentioned above.
The ICS844003-01 uses IDT’s 3rd generation low phase noise
VCO technology and can achieve 1ps or lower typical rms phase
jitter, easily meeting Ethernet jitter requirements. The
• 0°C to 70°C ambient operating temperature
• Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
ICS844003-01 is packaged in a small 24-pin TSSOP package.
Pin Assignment
DIV_SELB1
1
2
24
23
DIV_SELB0
VCO_SEL
VDDO_B
QB0
nQB0
MR
VDDO_A
3
4
22
21
5
6
7
20
19
18
17
QB1
nQB1
XTAL_SEL
QA0
nQA0
OEB
REF_CLK
8
OEA
9
XTAL_IN
XTAL_OUT
GND
FB_DIV
VDDA
VDD
DIV_SELA0
16
15
14
13
10
11
12
DIV_SEL
A1
ICS844003-01
24-Lead TSSOP, E-Pad
4.40mm x 7.8mm x 0.925mm
package body
Block Diagram
Pullup
OEA
G Package
Top View
Pullup
DIV_SELA[1:0]
Pullup
VCO_SEL
QA0
QA0
0 0 ÷1
Pulldown
0 1 ÷2
0
1
REF_CLK
XTAL_IN
0
1
1 0 ÷3
1 1 ÷4 (default)
Phase
Detector
VCO
OSC
XTAL_OUT
XTAL_SEL
Pullup
QB0
FB_DIV
0 0 ÷2
QB0
QB1
0 1 ÷4
0 = ÷25 (default)
1 = ÷32
1 0 ÷5
1 1 ÷8 (default)
Pulldown
Pullup
QB1
FB_DIV
DIV_SELB[1:0]
MR
Pulldown
Pullup
OEB
IDT™ / ICS™ LVDS FREQUENCY SYNTHESIZER
1
ICS844003BG-01 REV. A AUGUST 21, 2008