74VHC157

更新时间： 2024-11-23 22:56:23

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		复用器
页数	文件大小	规格书
7页	73K
描述
Quad 2-Input Multiplexer

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数据手册

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74VHC157 数据手册

November 1992

Revised April 1999

74VHC157

Quad 2-Input Multiplexer

age. This device can be used to interface 5V to 3V systems

and on two supply systems such as battery back up. This

circuit prevents device destruction due to mismatched sup-

ply and input voltages.

General Description

The VHC157 is an advanced high speed CMOS Quad 2-

Channel Multiplexer fabricated with silicon gate CMOS

technology. It achieves the high speed operation similar to

equivalent Bipolar Schottky TTL while maintaining the

CMOS low power dissipation.

Features

■ High Speed: t_PD= 4.1 ns (typ) at V_CC= 5V

■ Low power dissipation: I_CC= 4 µA (max.) at T_A= 25°C

■ High noise immunity: V_NIH= V_NIL= 28% V_CC(min.)

It consists of four 2-input digital multiplexers with common

select and enable inputs. When the ENABLE input is held

“H” level, selection of data is inhibited and all the outputs

become “L” level. The SELECT decoding determines

whether the I_0xor I_1xinputs get routed to their correspond-

■ Power down protection is provided on all inputs

■ Low noise: V_OLP= 0.8V (max.)

ing outputs.

An Input protection circuit ensures that 0V to 7V can be

applied to the input pins without regard to the supply volt-

■ Pin and function compatible with 74HC157

Ordering Code:

Order Number Package Number

Package Description

74VHC157M

74VHC157SJ

74VHC157MTC

74VHC157N

M16A

M16D

MTC16

N16E

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide

Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbols

Connection Diagram

IEEE/IEC

Pin Descriptions

Pin Names

I_0a–I_0d

I_1a–I_1d

Description

Source 0 Data Inputs

Source 1 Data Inputs

Enable Input

Select Input

Z_a–Z_d

Outputs

DS011536.prf

www.fairchildsemi.com

12 3 4 5 6 7

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74VHC157MSC	TI	获取价格	AHC/VHC SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO16, EIAJ TYPE1, PLASTI
74VHC157MSCX	FAIRCHILD	获取价格	暂无描述
74VHC157MTC	FAIRCHILD	获取价格	Quad 2-Input Multiplexer
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