74VHC157MTR

更新时间： 2024-11-20 04:48:03

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		解复用器逻辑集成电路光电二极管
页数	文件大小	规格书
12页	310K
描述
QUAD 2 CHANNEL MULTIPLEXER

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中文翻译

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数据手册

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74VHC157MTR 数据手册

74VHC157

QUAD 2 CHANNEL MULTIPLEXER

■

HIGH SPEED: t = 4.1 ns (TYP.) at V = 5V

PD CC

LOW POWER DISSIPATION:

= 4 µA (MAX.) at T =25°C

■

HIGH NOISE IMMUNITY:

= V = 28% V (MIN.)

NIH

NIL

■

POWER DOWN PROTECTION ON INPUTS

SYMMETRICAL OUTPUT IMPEDANCE:

SOP

TSSOP

|I | = I = 8 mA (MIN)

Table 1: Order Codes

PACKAGE

■

BALANCED PROPAGATION DELAYS:

PLH

PHL

T & R

OPERATING VOLTAGE RANGE:

(OPR) = 2V to 5.5V

SOP

74VHC157MTR

74VHC157TTR

PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 157

TSSOP

■

IMPROVED LATCH-UP IMMUNITY

input is held high selection of data is inhibited and

all the outputs become low. The SELECT

decoding determines whether the A or B inputs

get routed to their corresponding Y outputs.

Power down protection is provided on all inputs

and 0 to 7V can be accepted on inputs with no

regard to the supply voltage. This device can be

used to interface 5V to 3V. All inputs and outputs

are equipped with protection circuits against static

discharge, giving them 2KV ESD immunity and

transient excess voltage.

LOW NOISE: V

= 0.8V (MAX.)

OLP

DESCRIPTION

The 74VHC157 is an advanced high-speed

CMOS QUAD 2-CHANNEL MULTIPLEXER

fabricated with sub-micron silicon gate and

double-layer metal wiring C MOS technology.

It consists of four 2-input digital multiplexer with

common select and strobe inputs. It is a

non-inverting multiplexer. When the STROBE

Figure 1: Pin Connection And IEC Logic Symbols

Rev. 4

1/12

November 2004

12 3 4 5 6 7...12

中文翻译

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