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74VHC157MX PDF预览

74VHC157MX

更新时间: 2024-11-19 22:41:03
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 复用器逻辑集成电路光电二极管
页数 文件大小 规格书
7页 73K
描述
Quad 2-Input Multiplexer

74VHC157MX 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:SOIC
包装说明:SOP, SOP16,.25针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.08
系列:AHC/VHCJESD-30 代码:R-PDSO-G16
JESD-609代码:e3长度:9.9 mm
负载电容(CL):50 pF逻辑集成电路类型:MULTIPLEXER
最大I(ol):0.008 A湿度敏感等级:1
功能数量:4输入次数:2
输出次数:1端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:2/5.5 VProp。Delay @ Nom-Sup:9.5 ns
传播延迟(tpd):15 ns认证状态:Not Qualified
座面最大高度:1.75 mm子类别:Multiplexer/Demultiplexers
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.9 mm
Base Number Matches:1

74VHC157MX 数据手册

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November 1992  
Revised April 1999  
74VHC157  
Quad 2-Input Multiplexer  
age. This device can be used to interface 5V to 3V systems  
and on two supply systems such as battery back up. This  
circuit prevents device destruction due to mismatched sup-  
ply and input voltages.  
General Description  
The VHC157 is an advanced high speed CMOS Quad 2-  
Channel Multiplexer fabricated with silicon gate CMOS  
technology. It achieves the high speed operation similar to  
equivalent Bipolar Schottky TTL while maintaining the  
CMOS low power dissipation.  
Features  
High Speed: tPD = 4.1 ns (typ) at VCC = 5V  
Low power dissipation: ICC = 4 µA (max.) at TA = 25°C  
High noise immunity: VNIH = VNIL = 28% VCC (min.)  
It consists of four 2-input digital multiplexers with common  
select and enable inputs. When the ENABLE input is held  
“H” level, selection of data is inhibited and all the outputs  
become “L” level. The SELECT decoding determines  
whether the I0x or I1x inputs get routed to their correspond-  
Power down protection is provided on all inputs  
Low noise: VOLP = 0.8V (max.)  
ing outputs.  
An Input protection circuit ensures that 0V to 7V can be  
applied to the input pins without regard to the supply volt-  
Pin and function compatible with 74HC157  
Ordering Code:  
Order Number Package Number  
Package Description  
74VHC157M  
74VHC157SJ  
74VHC157MTC  
74VHC157N  
M16A  
M16D  
MTC16  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide  
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
I0a–I0d  
I1a–I1d  
E
Description  
Source 0 Data Inputs  
Source 1 Data Inputs  
Enable Input  
S
Select Input  
Za–Zd  
Outputs  
© 1999 Fairchild Semiconductor Corporation  
DS011536.prf  
www.fairchildsemi.com  

74VHC157MX 替代型号

型号 品牌 替代类型 描述 数据表
74VHC157M FAIRCHILD

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Quad 2-Input Multiplexer
SN74AHC157DR TI

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QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS
SN74AHC157D TI

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QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS

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