74VHC16240

更新时间： 2024-11-15 21:55:31

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		输出元件
页数	文件大小	规格书
10页	149K
描述
16-BIT BUS BUFFER WITH 3-STATE OUTPUTS (INVERTED)

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中文翻译

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数据手册

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74VHC16240 数据手册

74VHC16240

16-BIT BUS BUFFER

WITH 3-STATE OUTPUTS (INVERTED)

■

HIGH SPEED: t = 5.3 ns (TYP.) at V = 5V

PD CC

LOW POWER DISSIPATION:

= 4 µA (MAX.) at T =25°C

■

HIGH NOISE IMMUNITY

=V = 28% VCC (MIN.)

POWER DOWN PROTECTION ON INPUTS

& OUTPUTS

NIH

NIL

TSSOP

TUBE

SYMMETRICAL OUTPUT IMPEDANCE:

|I | = I = 8 mA (MIN)

BALANCED PROPAGATION DELAYS:

ORDER CODES

PACKAGE

PLH

PHL

T & R

OPERATING VOLTAGE RANGE:

(OPR) = 2V to 5.5V

TSSOP

74VHC16240TTR

■

IMPROVED LATCH-UP IMMUNITY

LOW NOISE: V = 0.9V (MAX.)

PIN CONNECTION

OLP

DESCRIPTION

The 74VHC16240 is an advanced high-speed

CMOS 16-BIT BUS BUFFER (3-STATE)

fabricated with sub-micron silicon gate and

double-layer metal wiring C MOS technology.

Any nG output control governs four BUS

BUFFERS. Output Enable inputs (nG) tied

together give full 16 bit operation.

When nG is LOW, the outputs are on. When nG is

HIGH, the output are in high impedance state.

This device is designed to be used with 3 state

memory address drivers, etc.

Power down protection is provided on all inputs

and outputs and 0 to 7V can be accepted on

inputs with no regard to the supply voltage. This

device can be used to interface 5V to 3V.

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

February 2003

1/10

12 3 4 5 6 7...10

中文翻译

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与74VHC16240相关器件

型号	品牌	获取价格	描述	数据表
74VHC16240TTR	STMICROELECTRONICS	获取价格	16-BIT BUS BUFFER WITH 3-STATE OUTPUTS (INVERTED)
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74VHC16373	STMICROELECTRONICS	获取价格	16-BIT D-TYPE LATCH WITH 3-STATE OUTPUTS NON INVERTING
74VHC16373_03	STMICROELECTRONICS	获取价格	16-BIT D-TYPE LATCH WITH 3-STATE OUTPUTS NON INVERTING
74VHC16373TTR	STMICROELECTRONICS	获取价格	16-BIT D-TYPE LATCH WITH 3-STATE OUTPUTS NON INVERTING
74VHC16374	STMICROELECTRONICS	获取价格	16-BIT D-TYPE FLIP FLOP WITH 3-STATE OUTPUTS NON INVERTING