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74VHC157_07 PDF预览

74VHC157_07

更新时间: 2024-11-20 04:48:03
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 复用器
页数 文件大小 规格书
12页 310K
描述
Quad 2-Input Multiplexer

74VHC157_07 数据手册

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74VHC157  
QUAD 2 CHANNEL MULTIPLEXER  
HIGH SPEED: t = 4.1 ns (TYP.) at V = 5V  
PD CC  
LOW POWER DISSIPATION:  
I
= 4 µA (MAX.) at T =25°C  
CC  
A
HIGH NOISE IMMUNITY:  
= V = 28% V (MIN.)  
V
NIH  
NIL  
CC  
POWER DOWN PROTECTION ON INPUTS  
SYMMETRICAL OUTPUT IMPEDANCE:  
SOP  
TSSOP  
|I | = I = 8 mA (MIN)  
OH  
OL  
Table 1: Order Codes  
PACKAGE  
BALANCED PROPAGATION DELAYS:  
t
t
PLH  
PHL  
T & R  
OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 5.5V  
V
SOP  
74VHC157MTR  
74VHC157TTR  
CC  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 157  
TSSOP  
IMPROVED LATCH-UP IMMUNITY  
input is held high selection of data is inhibited and  
all the outputs become low. The SELECT  
decoding determines whether the A or B inputs  
get routed to their corresponding Y outputs.  
Power down protection is provided on all inputs  
and 0 to 7V can be accepted on inputs with no  
regard to the supply voltage. This device can be  
used to interface 5V to 3V. All inputs and outputs  
are equipped with protection circuits against static  
discharge, giving them 2KV ESD immunity and  
transient excess voltage.  
LOW NOISE: V  
= 0.8V (MAX.)  
OLP  
DESCRIPTION  
The 74VHC157 is an advanced high-speed  
CMOS QUAD 2-CHANNEL MULTIPLEXER  
fabricated with sub-micron silicon gate and  
2
double-layer metal wiring C MOS technology.  
It consists of four 2-input digital multiplexer with  
common select and strobe inputs. It is a  
non-inverting multiplexer. When the STROBE  
Figure 1: Pin Connection And IEC Logic Symbols  
Rev. 4  
1/12  
November 2004  

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