May 2007
74VHC08
tm
Quad 2-Input AND Gate
Features
General Description
■ High Speed: t = 4.3ns (Typ.) at T = 25°C
The VHC08 is an advanced high speed CMOS 2 Input
AND Gate fabricated with silicon gate CMOS technol-
ogy. It achieves the high-speed operation similar to
equivalent Bipolar Schottky TTL while maintaining the
CMOS low power dissipation.
PD
A
■ High noise immunity: V
= V
= 28% V (Min.)
NIH
NIL
CC
■ Power down protection is provided on all inputs
■ Low power dissipation: I = 2µA (Max.) @ T = 25°C
CC
A
■ Low noise: V
= 0.8V (Max.)
OLP
The internal circuit is composed of 4 stages including
buffer output, which provide high noise immunity and
stable output. An input protection circuit insures that 0V
to 7V can be applied to the input pins without regard to
the supply voltage. This device can be used to interface
5V to 3V systems and two supply systems such as bat-
tery backup. This circuit prevents device destruction due
to mismatched supply and input voltages.
■ Pin and function compatible with 74HC08
Ordering Information
Package
Order Number
Number
Package Description
74VHC08M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150"
Narrow
(1)
74VHC08MX_NL
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150"
Narrow
74VHC08SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74VHC08MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
(1)
74VHC08MTCX_NL
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,
4.4mm Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the
ordering number. Pb-Free package per JEDEC J-STD-020B.
Note:
1. Device available in Tape and Reel only.
©1992 Fairchild Semiconductor Corporation
74VHC08 Rev. 1.3
www.fairchildsemi.com