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74VHC08MX_NL PDF预览

74VHC08MX_NL

更新时间: 2024-11-03 21:54:39
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 栅极触发器逻辑集成电路光电二极管
页数 文件大小 规格书
7页 101K
描述
Quad 2-Input AND Gate

74VHC08MX_NL 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:SOIC包装说明:0.150 INCH, LEAD FREE, MS-012, SOIC-14
针数:14Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.06
Is Samacsys:N系列:AHC/VHC
JESD-30 代码:R-PDSO-G14JESD-609代码:e3
长度:8.6235 mm负载电容(CL):50 pF
逻辑集成电路类型:AND GATE最大I(ol):0.008 A
湿度敏感等级:1功能数量:4
输入次数:2端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:2/5.5 V
Prop。Delay @ Nom-Sup:9 ns传播延迟(tpd):14 ns
认证状态:Not Qualified施密特触发器:NO
座面最大高度:1.753 mm子类别:Gates
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.9 mm
Base Number Matches:1

74VHC08MX_NL 数据手册

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November 1992  
Revised February 2005  
74VHC08  
Quad 2-Input AND Gate  
General Description  
Features  
The VHC08 is an advanced high speed CMOS 2 Input  
AND Gate fabricated with silicon gate CMOS technology. It  
achieves the high-speed operation similar to equivalent  
Bipolar Schottky TTL while maintaining the CMOS low  
power dissipation.  
High Speed: tPD 4.3 ns (typ) at TA 25 C  
High noise immunity: VNIH VNIL 28% VCC (min)  
Power down protection is provided on all inputs  
Low power dissipation: ICC  
2 A (Max) @ TA 25 C  
The internal circuit is composed of 4 stages including buffer  
output, which provide high noise immunity and stable out-  
put. An input protection circuit insures that 0V to 7V can be  
applied to the input pins without regard to the supply volt-  
age. This device can be used to interface 5V to 3V systems  
and two supply systems such as battery backup. This cir-  
cuit prevents device destruction due to mismatched supply  
and input voltages.  
Low noise: VOLP 0.8V (max)  
Pin and function compatible with 74HC08  
Ordering Code:  
Package  
Order Number  
Package Description  
Number  
74VHC08M  
M14A  
M14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
74VHC08MX_NL  
(Note 1)  
Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
74VHC08SJ  
M14D  
MTC14  
MTC14  
Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74VHC08MTC  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
74VHC08MTCX_NL  
(Note 1)  
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
74VHC08N  
N14A  
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Pb-Free package per JEDEC J-STD-020B.  
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.  
Logic Symbol  
Connection Diagram  
IEEE/IEC  
Truth Table  
A
L
B
L
O
L
Pin Descriptions  
Pin Names  
Description  
Inputs  
Outputs  
L
H
L
L
An, Bn  
On  
H
H
L
H
H
© 2005 Fairchild Semiconductor Corporation  
DS011514  
www.fairchildsemi.com  

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