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74VCX162244DTR PDF预览

74VCX162244DTR

更新时间: 2024-11-06 19:51:03
品牌 Logo 应用领域
安森美 - ONSEMI 驱动光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
12页 138K
描述
ALVC/VCX/A SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PDSO48, TSSOP-48

74VCX162244DTR 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP48,.3,20
针数:48Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.16
控制类型:ENABLE LOW系列:ALVC/VCX/A
JESD-30 代码:R-PDSO-G48JESD-609代码:e0
长度:12.5 mm负载电容(CL):30 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.012 A
位数:4功能数量:4
端口数量:2端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE WITH SERIES RESISTOR输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP48,.3,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):240电源:3.3 V
Prop。Delay @ Nom-Sup:3.3 ns传播延迟(tpd):7.6 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:6.1 mmBase Number Matches:1

74VCX162244DTR 数据手册

 浏览型号74VCX162244DTR的Datasheet PDF文件第2页浏览型号74VCX162244DTR的Datasheet PDF文件第3页浏览型号74VCX162244DTR的Datasheet PDF文件第4页浏览型号74VCX162244DTR的Datasheet PDF文件第5页浏览型号74VCX162244DTR的Datasheet PDF文件第6页浏览型号74VCX162244DTR的Datasheet PDF文件第7页 
74VCX162244  
Low-Voltage 1.8/2.5/3.3V  
16-Bit Buffer  
With 26 Series Resistors 3.6 V–Tolerant  
Inputs and Outputs (3–State, Non–Inverting)  
The 74VCX162244 is an advanced performance, non–inverting  
16–bit buffer. It is designed for very high–speed, very low–power  
operation in 1.8 V, 2.5 V or 3.3 V systems.  
http://onsemi.com  
MARKING DIAGRAM  
When operating at 2.5 V (or 1.8 V) the part is designed to tolerate  
voltages it may encounter on either inputs or outputs when interfacing  
to 3.3 V busses. It is guaranteed to be over–voltage tolerant to 3.6 V.  
The 74VCX162244 is nibble controlled with each nibble  
functioning identically, but independently. It is designed with 26  
series resistors in each of the outputs to reduce noise. The control pins  
may be tied together to obtain full 16–bit operation. The 3–state  
outputs are controlled by an Output Enable (OEn) input for each  
nibble. When OEn is LOW, the outputs are on. When OEn is HIGH,  
the outputs are in the high impedance state.  
48  
48  
74VCX162244DT  
AWLYYWW  
1
TSSOP–48  
DT SUFFIX  
CASE 1201  
1
A
= Assembly Location  
Designed for Low Voltage Operation: V = 1.65–3.6 V  
3.6 V Tolerant Inputs and Outputs  
WL = Wafer Lot  
YY = Year  
WW = Work Week  
CC  
High Speed Operation: 3.3 ns max for 3.0 to 3.6 V  
3.8 ns max for 2.3 to 2.7 V  
7.6 ns max for 1.65 to 1.95 V  
Static Drive: ±12 mA Drive at 3.0 V  
±8 mA Drive at 2.3 V  
ORDERING INFORMATION  
±3 mA Drive at 1.65 V  
Device  
Package  
TSSOP  
TSSOP  
Shipping  
39 / Rail  
Supports Live Insertion and Withdrawal  
74VCX162244DT  
74VCX162244DTR  
I  
Specification Guarantees High Impedance When V = 0 V  
OFF  
CC  
2500 / Reel  
Near Zero Static Supply Current in All Three Logic States (20 µA)  
Substantially Reduces System Power Requirements  
Latchup Performance Exceeds ±300 mA @ 125°C  
ESD Performance: Human Body Model >2000 V; Machine Model >200 V  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
August, 2000 – Rev. 0  
74VCX162244/D  

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