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74VCX162374DT PDF预览

74VCX162374DT

更新时间: 2024-11-20 15:45:07
品牌 Logo 应用领域
安森美 - ONSEMI 驱动光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
12页 147K
描述
ALVC/VCX/A SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48, TSSOP-48

74VCX162374DT 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP48,.3,20
针数:48Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.55
系列:ALVC/VCX/AJESD-30 代码:R-PDSO-G48
JESD-609代码:e0长度:12.5 mm
负载电容(CL):30 pF逻辑集成电路类型:BUS DRIVER
最大频率@ Nom-Sup:250000000 Hz最大I(ol):0.012 A
位数:8功能数量:2
端口数量:2端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE WITH SERIES RESISTOR输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP48,.3,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:RAIL
峰值回流温度(摄氏度):240电源:3.3 V
Prop。Delay @ Nom-Sup:3.4 ns传播延迟(tpd):9.6 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:FF/Latches最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):1.65 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
触发器类型:POSITIVE EDGE宽度:6.1 mm
Base Number Matches:1

74VCX162374DT 数据手册

 浏览型号74VCX162374DT的Datasheet PDF文件第2页浏览型号74VCX162374DT的Datasheet PDF文件第3页浏览型号74VCX162374DT的Datasheet PDF文件第4页浏览型号74VCX162374DT的Datasheet PDF文件第5页浏览型号74VCX162374DT的Datasheet PDF文件第6页浏览型号74VCX162374DT的Datasheet PDF文件第7页 
74VCX162374  
Low-Voltage 1.8/2.5/3.3V  
16-Bit D-Type Flip-Flop  
With 26W Series Resisters and  
3.6V–Tolerant Inputs and Outputs  
(3–State, Non–Inverting)  
http://onsemi.com  
MARKING DIAGRAM  
The 74VCX162374 is an advanced performance, non–inverting 16–bit  
D–type flip–flop. It is designed for very high–speed, very low–power  
operation in 1.8 V, 2.5 V or 3.3 V systems. The VCX162374 is byte  
controlled, with each byte functioning identically, but independently.  
Each byte has separate Output Enable and Clock Pulse inputs. These  
control pins can be tied together for full 16–bit operation.  
When operating at 2.5 V (or 1.8 V) the part is designed to tolerate  
voltages it may encounter on either inputs or outputs when interfacing to  
3.3 V busses. It is guaranteed to be over–voltage tolerant to 3.6 V.  
The 74VCX162374 consists of 16 edge–triggered flip–flops with  
individual D–type inputs and 3.6 V–tolerant 3–state outputs. It is  
designed with 26 W series resistors in each of the outputs to reduce noise.  
The clocks (CPn) and Output Enables (OEn) are common to all flip–flops  
within the respective byte. The flip–flops will store the state of individual  
D inputs that meet the setup and hold time requirements on the  
LOW–to–HIGH Clock (CP) transition. With the OE LOW, the contents  
of the flip–flops are available at the outputs. When the OE is HIGH, the  
outputs go to the high impedance state. The OE input level does not affect  
the operation of the flip–flops.  
48  
48  
74VCX162374DT  
AWLYYWW  
1
TSSOP–48  
DT SUFFIX  
CASE 1201  
1
A
= Assembly Location  
WL = Wafer Lot  
YY = Year  
WW = Work Week  
Designed for Low Voltage Operation: V = 1.65–3.6 V  
ORDERING INFORMATION  
CC  
3.6 V Tolerant Inputs and Outputs  
High Speed Operation: 3.4 ns max for 3.0 to 3.6 V  
4.8 ns max for 2.3 to 2.7 V  
Device  
Package  
TSSOP  
TSSOP  
Shipping  
39 / Rail  
74VCX162374DT  
74VCX162374DTR  
2500 / Reel  
9.6 ns max for 1.65 to 1.95 V  
Static Drive:  
±12 mA Drive at 3.0 V  
±8 mA Drive at 2.3 V  
±3 mA Drive at 1.65 V  
Supports Live Insertion and Withdrawal  
I  
Specification Guarantees High Impedance When V = 0 V  
OFF  
CC  
Near Zero Static Supply Current in All Three Logic States (20 µA)  
Substantially Reduces System Power Requirements  
Latchup Performance Exceeds ±300mA @ 125°C  
ESD Performance: Human Body Model >2000 V; Machine Model  
>200 V  
Semiconductor Components Industries, LLC, 2000  
1
Publication Order Number:  
August, 2000 – Rev. 0  
74VCX162374/D  

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