Datasheet > 74VCX16240/D

74VCX16240/D

更新时间： 2024-09-15 23:24:35

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其他 - ETC		/
页数	文件大小	规格书
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Low-Voltage 1.8/2.5/3.3V 16-Bit Buffer

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74VCX16240/D 数据手册

74VCXH16240

Low-Voltage 1.8/2.5/3.3V

16-Bit Buffer

With 3.6 V–Tolerant Inputs and Outputs

(3–State, Inverting)

The 74VCXH16240 is an advanced performance, inverting 16–bit

buffer. It is designed for very high–speed, very low–power operation

in 1.8 V, 2.5 V or 3.3 V systems.

http://onsemi.com

MARKING DIAGRAM

When operating at 2.5 V (or 1.8 V) the part is designed to tolerate

voltages it may encounter on either inputs or outputs when interfacing

to 3.3 V busses. It is guaranteed to be over–voltage tolerant to 3.6 V.

The 74VCXH16240 is nibble controlled with each nibble

functioning identically, but independently. The control pins may be

tied together to obtain full 16–bit operation. The 3–state outputs are

controlled by an Output Enable (OEn) input for each nibble. When

OEn is LOW, the outputs are on. When OEn is HIGH, the outputs are

in the high impedance state. The data inputs include active bushold

circuitry, eliminating the need for external pull–up resistors to hold

unused or floating inputs at a valid logic state.

74VCXH16240DT

AWLYYWW

TSSOP–48

DT SUFFIX

CASE 1201

= Assembly Location

WL = Wafer Lot

YY = Year

• Designed for Low Voltage Operation: V = 1.65–3.6 V

• 3.6 V Tolerant Inputs and Outputs

WW = Work Week

• High Speed Operation: 2.5 ns max for 3.0 to 3.6 V

3.0 ns max for 2.3 to 2.7 V

6.0 ns max for 1.65 to 1.95 V

ORDERING INFORMATION

• Static Drive: ±24 mA Drive at 3.0 V

±18 mA Drive at 2.3 V

Device

Package

TSSOP

Shipping

39 / Rail

±6 mA Drive at 1.65 V

74VCXH16240DT

74VCXH16240DTR

• Supports Live Insertion and Withdrawal

2500 / Reel

• Includes Active Bushold to Hold Unused or Floating Inputs at a Valid

Logic State

• I

Specification Guarantees High Impedance When V = 0 V†

OFF

• Near Zero Static Supply Current in All Three Logic States (20 µA)

Substantially Reduces System Power Requirements

• Latchup Performance Exceeds ±250mA @ 125°C

• ESD Performance: Human Body Model >2000 V; Machine Model >200 V

†NOTE: To ensure the outputs activate in the 3–state condition, the output

enable pins should be connected to V

through a pull–up resistor. The

value of the resistor is determined by the current sinking capability of the

output connected to the OE pin.

Semiconductor Components Industries, LLC, 2001

Publication Order Number:

January, 2001 – Rev. 1

74VCXH16240/D

12 3 4 5 6 7...12

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与74VCX16240/D相关器件

型号	品牌	获取价格	描述	数据表
74VCX16240_05	FAIRCHILD	获取价格	Low Voltage 16-Bit Inverting Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs
74VCX16240DT	STMICROELECTRONICS	获取价格	Low−Voltage 1.8/2.5/3.3V 16−Bit Buffer
74VCX16240DTR	STMICROELECTRONICS	获取价格	Low−Voltage 1.8/2.5/3.3V 16−Bit Buffer
74VCX16240MEA	FAIRCHILD	获取价格	Bus Driver, ALVC/VCX/A Series, 4-Func, 4-Bit, Inverted Output, CMOS, PDSO48
74VCX16240MEAX	FAIRCHILD	获取价格	暂无描述
74VCX16240MTD	FAIRCHILD	获取价格	Low Voltage 16-Bit Inverting Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs
74VCX16240MTDX	FAIRCHILD	获取价格	Quad 4-Bit Buffer/Driver
74VCX16240T	ETC	获取价格	Quad 4-Bit Buffer/Driver
74VCX16240TTR	STMICROELECTRONICS	获取价格	LOW VOLTAGE CMOS 16-BIT BUS BUFFER (3-STATE INV.) WITH 3.6V TOLERANT INPUTS AND OUTPUTS
74VCX16244	FAIRCHILD	获取价格	Low Voltage 16-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs

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