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74VCX162240MTDX PDF预览

74VCX162240MTDX

更新时间: 2024-11-23 23:24:35
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动器逻辑集成电路光电二极管
页数 文件大小 规格书
7页 56K
描述
Quad 4-Bit Buffer/Driver

74VCX162240MTDX 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP48,.3,20
针数:48Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.42
控制类型:ENABLE LOW系列:ALVC/VCX/A
JESD-30 代码:R-PDSO-G48JESD-609代码:e3
长度:12.5 mm负载电容(CL):30 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.012 A
湿度敏感等级:2位数:4
功能数量:4端口数量:2
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE WITH SERIES RESISTOR
输出极性:INVERTED封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP48,.3,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:3.3 ns
传播延迟(tpd):15.2 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.4 V
标称供电电压 (Vsup):1.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:6.1 mm
Base Number Matches:1

74VCX162240MTDX 数据手册

 浏览型号74VCX162240MTDX的Datasheet PDF文件第2页浏览型号74VCX162240MTDX的Datasheet PDF文件第3页浏览型号74VCX162240MTDX的Datasheet PDF文件第4页浏览型号74VCX162240MTDX的Datasheet PDF文件第5页浏览型号74VCX162240MTDX的Datasheet PDF文件第6页浏览型号74VCX162240MTDX的Datasheet PDF文件第7页 
January 1998  
Revised April 1999  
74VCX162240  
Low Voltage 16-Bit Inverting Buffer/Line Driver with 3.6V  
Tolerant Inputs and Outputs and 26Series Resistors in  
Outputs  
General Description  
Features  
The VCX162240 contains sixteen inverting buffers with 3-  
STATE outputs to be employed as a memory and address  
driver, clock driver, or bus oriented transmitter/receiver.  
The device is nibble (4-bit) controlled. Each nibble has sep-  
arate 3-STATE control inputs which can be shorted  
together for full 16-bit operation.  
1.65V–3.6V VCC supply operation  
3.6V tolerant inputs and outputs  
26series resistors in outputs  
tPD  
3.3 ns max for 3.0V to 3.6V VCC  
3.8 ns max for 2.3V to 2.7V VCC  
7.6 ns max for 1.65V to 1.95V VCC  
The 74VCX162240 is designed for low voltage (1.65V to  
3.6V) VCC applications with I/O capability up to 3.6V. The  
74VCX162240 is also designed with 26series resistors in  
the outputs. This design reduces line noise in applications  
such as memory address drivers, clock drivers, and bus  
transceivers/transmitters.  
Power-off high impedance inputs and outputs  
Supports live insertion and withdrawal (Note 1)  
Static Drive (IOH/IOL  
)
The 74VCX162240 is fabricated with an advanced CMOS  
technology to achieve high speed operation while maintain-  
ing low CMOS power dissipation.  
±12 mA @ 3.0V VCC  
±8 mA @ 2.3V VCC  
±3 mA @ 1.65V VCC  
Uses patented noise/EMI reduction circuitry  
Latch-up performance exceeds 300 mA  
ESD performance:  
Human body model > 2000V  
Machine model > 200V  
Note 1: To ensure the high-impedance state during power up or power  
down, OE should be tied to V  
through a pull-up resistor; the minimum  
CC  
value of the resistor is determined by the current-sourcing capability of the  
driver.  
Ordering Code:  
Order Number  
Package Number  
Package Descriptions  
74VCX162240MTD  
MTD48  
48-Lead Thin Shrink Small Outline Package (TSSOP), JECED MO-153, 6.1mm Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbol  
Pin Descriptions  
Pin Names  
OEn  
Description  
Output Enable Input (Active LOW)  
Inputs  
I0–I15  
O0–O15  
Outputs  
© 1999 Fairchild Semiconductor Corporation  
DS500091.prf  
www.fairchildsemi.com  

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