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74VCX162244

更新时间: 2024-11-23 22:37:03
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动器
页数 文件大小 规格书
10页 122K
描述
Low Voltage 16-Bit Buffer/Line Driver with 3.6V Tolerant Inputs and Outputs and 26ヘ Series Resistor in Outputs

74VCX162244 数据手册

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August 1997  
Revised June 2005  
74VCX162244  
Low Voltage 16-Bit Buffer/Line Driver  
with 3.6V Tolerant Inputs and Outputs  
and 26: Series Resistor in Outputs  
General Description  
The VCX162244 contains sixteen non-inverting buffers  
with 3-STATE outputs to be employed as a memory and  
Features  
1.2V to 3.6V VCC supply operation  
3.6V tolerant inputs and outputs  
address driver, clock driver, or bus oriented transmitter/  
receiver. The device is nibble (4-bit) controlled. Each nibble  
has separate 3-STATE control inputs which can be shorted  
together for full 16-bit operation.  
26 series resistors in outputs  
tPD  
The 74VCX162244 is designed for low voltage (1.2V to  
3.6V) VCC applications with I/O capability up to 3.6V. The  
3.3 ns max for 3.0V to 3.6V VCC  
74VCX162244 is also designed with 26 series resistors in  
the outputs. This design reduces line noise in applications  
such as memory address drivers, clock drivers, and bus  
transceivers/transmitters.  
Power-off high impedance inputs and outputs  
Supports live insertion and withdrawal  
Static Drive (IOH/IOL  
)
12 mA @ 3.0V VCC  
The 74VCX162244 is fabricated with an advanced CMOS  
technology to achieve high speed operation while maintain-  
ing low CMOS power dissipation.  
Uses patented noise/EMI reduction circuitry  
Latch-up performance exceeds 300 mA  
ESD performance:  
Human body model 2000V  
Machine model 200V  
Also packaged in plastic Fine-Pitch Ball Grid Array  
(FBGA)  
Note 1: To ensure the high-impedance state during power up or power  
down, OE should be tied to V  
through a pull-up resistor; the minimum  
CC  
value of the resistor is determined by the current-sourcing capability of the  
driver.  
Ordering Code:  
Order Number  
Package Number  
Package Description  
74VCX162244G  
(Note 2)(Note 3)  
BGA54A  
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide  
74VCX162244MTD  
(Note 3)  
MTD48  
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
Note 2: Ordering Code “G” indicates Trays.  
Note 3: Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbol  
© 2005 Fairchild Semiconductor Corporation  
DS500040  
www.fairchildsemi.com  

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