Datasheet > 74LVX373SJ

74LVX373SJ

更新时间： 2024-11-14 04:47:59

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		锁存器逻辑集成电路光电二极管驱动
页数	文件大小	规格书
13页	304K
描述
Low Voltage Octal Transparent Latch with TRI-STATE Outputs

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74LVX373SJ 数据手册

74LVX373

LOW VOLTAGE CMOS OCTAL D-TYPE LATCH

(3-STATE NON INV.) WITH 5V TOLERANT INPUTS

■

HIGH SPEED:

=5.8ns (TYP.) at V = 3.3V

■

5V TOLERANT INPUTS

POWER-DOWN PROTECTION ON INPUTS

INPUT VOLTAGE LEVEL:

= 0.8V, V = 2V at V =3V

IH CC

SOP

TSSOP

■

LOW POWER DISSIPATION:

= 4 µA (MAX.) at T =25°C

LOW NOISE:

= 0.3V (TYP.) at V =3.3V

Table 1: Order Codes

PACKAGE

OLP

SYMMETRICAL OUTPUT IMPEDANCE:

|I | = I = 4 mA (MIN) at V =3V

T & R

SOP

74LVX373MTR

74LVX373TTR

BALANCED PROPAGATION DELAYS:

TSSOP

PLH

PHL

OPERATING VOLTAGE RANGE:

(OPR) = 2V to 3.6V (1.2V Data Retention)

When the LE is taken low, the Q outputs will be

latched precisely at the logic level of D input data.

While the (OE) input is low, the 8 outputs will be in

a normal logic state (high or low logic level) and

while high level the outputs will be in a high

impedance state.

Power down protection is provided on all inputs

and 0 to 7V can be accepted on inputs with no

regard to the supply voltage.

This device can be used to interface 5V to 3V. It

combines high speed performance with the true

CMOS low power consumption.

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 373

IMPROVED LATCH-UP IMMUNITY

DESCRIPTION

The 74LVX373 is a low voltage CMOS OCTAL

D-TYPE LATCH with 3 STATE OUTPUT NON

INVERTING fabricated with sub-micron silicon

gate and double-layer metal wiring C MOS

technology. It is ideal for low power, battery

operated and low noise 3.3V applications.

This 8 bit D-Type latch is controlled by a latch

enable input (LE) and an output enable input (OE).

While the LE input is held at a high level, the Q

outputs will follow the data input precisely.

Figure 1: Pin Connection And IEC Logic Symbols

Rev. 4

1/13

August 2004

12 3 4 5 6 7...13

中文翻译

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与74LVX373SJ相关器件

型号	品牌	获取价格	描述	数据表
74LVX373SJX	STMICROELECTRONICS	获取价格	Low Voltage Octal Transparent Latch with TRI-STATE Outputs
74LVX373SJX	TI	获取价格	LV/LV-A/LVX/H SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, EIAJ TYPE2, PLASTIC, SOIC-20
74LVX373T	ETC	获取价格	8-Bit D-Type Latch
74LVX373TTR	STMICROELECTRONICS	获取价格	LOW VOLTAGE CMOS OCTAL D-TYPE LATCH (3-STATE NON INV.) WITH 5V TOLERANT INPUTS
74LVX374	FAIRCHILD	获取价格	Low Voltage Octal D-Type Flip-Flop with 3-STATE Outputs
74LVX374	STMICROELECTRONICS	获取价格	LOW VOLTAGE CMOS OCTAL D-TYPE FLIP-FLOP (3-STATE NON INV.) WITH 5V TOLERANT INPUTS
74LVX374	ONSEMI	获取价格	Octal D-Type Flip-Flop with 3-State Outputs With 5V−Tolerant Inputs
74LVX374M	FAIRCHILD	获取价格	Low Voltage Octal D-Type Flip-Flop with 3-STATE Outputs
74LVX374MSCX	TI	获取价格	LV/LV-A/LVX/H SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, EIAJ TYPE1, PLASTIC, SSOP-20
74LVX374MSCX	FAIRCHILD	获取价格	Bus Driver, LV/LV-A/LVX/H Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, EIAJ TYPE1, PL

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