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74LVX374 PDF预览

74LVX374

更新时间: 2024-09-28 22:53:19
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 触发器
页数 文件大小 规格书
7页 95K
描述
Low Voltage Octal D-Type Flip-Flop with 3-STATE Outputs

74LVX374 数据手册

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October 1993  
Revised April 2005  
74LVX374  
Low Voltage Octal D-Type Flip-Flop with  
3-STATE Outputs  
General Description  
Features  
Input voltage translation from 5V to 3V  
The LVX374 is a high-speed, low-power octal D-type flip-  
flop featuring separate D-type inputs for each flip-flop and  
3-STATE outputs for bus-oriented applications. A buffered  
Clock (CP) and Output Enable (OE) are common to all flip-  
flops. The inputs tolerate up to 7V allowing interface of 5V  
systems to 3V systems.  
Ideal for low power/low noise 3.3V applications  
Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
Ordering Code:  
Order Number Package Number  
Package Description  
74LVX374M  
M20B  
M20D  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
74LVX374SJ  
74LVX374MTC  
MTC20  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Pb-Free package per JEDEC J-STD-020B.  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
Description  
D0D7  
CP  
Data Inputs  
Clock Pulse Input  
OE  
3-STATE Output Enable Input  
3-STATE Outputs  
O0O7  
© 2005 Fairchild Semiconductor Corporation  
DS011612  
www.fairchildsemi.com  

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