Datasheet > 74LVTH16240MTDX

74LVTH16240MTDX

更新时间： 2025-09-22 19:01:23

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
6页	106K
描述
类型:缓冲器，反向;功能单元数:4;位数(bit):4;元器件封装:48-TSSOP;

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74LVTH16240MTDX 数据手册

March 1999

Revised June 2005

74LVT16240 • 74LVTH16240

Low Voltage 16-Bit Inverting Buffer/Line Driver

with 3-STATE Outputs

General Description

Features

■ Input and output interface capability to systems at

The LVT16240 and LVTH16240 contain sixteen inverting

buffers with 3-STATE outputs designed to be employed as

a memory and address driver, clock driver, or bus-oriented

transmitter/receiver. The device is nibble controlled.

5V V_CC

■ Bushold data inputs eliminate the need for external

pull-up resistors to hold unused inputs (74LVTH16240),

also available without bushold feature (74LVT16240)

Individual 3-STATE control inputs can be shorted together

for 8-bit or 16-bit operation.

■ Live insertion/extraction permitted

The LVTH16240 data inputs include bushold, eliminating

the need for external pull-up resistors to hold unused

inputs.

■ Power Up/Down high impedance provides glitch-free

bus loading

■ Outputs source/sink 32 mA/ 64 mA

■ Functionally compatible with the 74 series 16240

■ Latch-up performance exceeds 500 mA

■ ESD performance:

These buffers and line drivers are designed for low-voltage

(3.3V) V_CCapplications, but with the capability to provide a

TTL interface to a 5V environment. The LVT16240 and

LVTH16240 are fabricated with an advanced BiCMOS

technology to achieve high speed operation similar to 5V

ABT while maintaining a low power dissipation.

Human-body model 2000V

Machine model 200V

Charged-device model 1000V

Ordering Code:

Package

Order Number

Package Description

Number

74LVT16240MEA

74LVT16240MTD

74LVTH16240MEA

74LVTH16240MTD

MS48A

MTD48

MS48A

MTD48

48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbol

DS012025

www.fairchildsemi.com

12 3 4 5 6

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与74LVTH16240MTDX相关器件

型号	品牌	获取价格	描述	数据表
74LVTH16240MTDX_NL	FAIRCHILD	获取价格	Bus Driver, LVT Series, 4-Func, 4-Bit, Inverted Output, BICMOS, PDSO48, 6.10 MM, LEAD FREE
74LVTH16244	TI	获取价格	3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
74LVTH16244	FAIRCHILD	获取价格	Low Voltage16-Bit Buffer/Line Driver with 3-STATE Outputs
74LVTH16244	STMICROELECTRONICS	获取价格	LOW VOLTAGE BICMOS 16 BIT BUS BUFFER WITH BUS HOLD AND POWER UP 3-STATE
74LVTH16244	SGMICRO	获取价格	3.3V, 16-Bit Buffer/Line Driver with 3-State Outputs
74LVTH16244ADGGRE4	TI	获取价格	3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
74LVTH16244ADGGRG4	TI	获取价格	3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
74LVTH16244ADGVRE4	TI	获取价格	3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
74LVTH16244ADGVRG4	TI	获取价格	3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
74LVTH16244ADLRG4	TI	获取价格	3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

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