Datasheet > 74LVC244AM

74LVC244AM

更新时间： 2024-11-10 23:24:23

品牌	Logo	应用领域
其他 - ETC		驱动器逻辑集成电路光电二极管
页数	文件大小	规格书
9页	71K
描述
Buffer/Driver

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中文翻译

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数据手册

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74LVC244AM 数据手册

74LVC244A

LOW VOLTAGE CMOS QUAD BUS BUFFERS (3-STATE)

HIGH PERFORMANCE

■

5V TOLERANT INPUTS

HIGH SPEED: t = 5.9ns (MAX.) at V = 3V

POWER DOWN PROTECTION ON INPUTS

AND OUTPUTS

■

SYMMETRICAL OUTPUT IMPEDANCE:

|I | = I = 24mA (MIN) at V = 3V

PCI BUS LEVELS GUARANTEED AT 24 mA

SOP

TSSOP

■

BALANCED PROPAGATION DELAYS:

PHL

PLH

ORDER CODES

PACKAGE

■

OPERATING VOLTAGE RANGE:

(OPR) = 1.65V to 3.6V (1.2V Data

Retention)

PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 244

LATCH-UP PERFORMANCE EXCEEDS

500mA (JESD 17)

TUBE

T & R

SOP

74LVC244AM

74LVC244AMTR

74LVC244ATTR

■

TSSOP

It can be interfaced to 5V signal environment for

inputs in mixed 3.3/5V system.

ESD PERFORMANCE:

HBM > 2000V (MIL STD 883 method 3015);

MM > 200V

G control output governs four BUS BUFFERs.

This device is designed to be used with 3 state

memory address drivers, etc.

It has more speed performance at 3.3V than 5V

AC/ACT family, combined with a lower power

consumption.

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

DESCRIPTION

The 74LVC244A is a low voltage CMOS OCTAL

BUS BUFFER (3-STATE) fabricated with

sub-micron silicon gate and double-layer metal

wiring C MOS technology. It is ideal for 1.65 to 3.6

operations and low power and low noise

applications.

PIN CONNECTION AND IEC LOGIC SYMBOLS

February 2002

1/9

12 3 4 5 6 7...9

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