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74LVC244APW-Q100 PDF预览

74LVC244APW-Q100

更新时间: 2023-09-03 20:27:34
品牌 Logo 应用领域
安世 - NEXPERIA /
页数 文件大小 规格书
15页 254K
描述
Octal buffer/line driver; 3-stateProduction

74LVC244APW-Q100 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:TSSOP,Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.56
其他特性:IT ALSO OPERATES AT 1.65 TO 3.6系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G20长度:6.5 mm
逻辑集成电路类型:BUS DRIVER位数:4
功能数量:2端口数量:2
端子数量:20最高工作温度:125 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):NOT SPECIFIED
传播延迟(tpd):15.8 ns筛选级别:AEC-Q100
座面最大高度:1.1 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):1.2 V标称供电电压 (Vsup):1.8 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:4.4 mm
Base Number Matches:1

74LVC244APW-Q100 数据手册

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74LVC244A-Q100;  
74LVCH244A-Q100  
Octal buffer/line driver; 3-state  
Rev. 6 — 15 February 2021  
Product data sheet  
1. General description  
The 74LVC244A-Q100; 74LVCH244A-Q100 is an octal non-inverting buffer/line driver with 3-state  
outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on  
nOE causes the outputs to assume a high-impedance OFF-state. Schmitt-trigger action at all inputs  
makes the circuit highly tolerant for slower input rise and fall times.  
Inputs can be driven from either 3.3 V or 5.0 V devices. In 3-state operation, outputs can handle  
5 V. These features allow the use of these devices as translators in a mixed 3.3 V and 5 V  
environment.  
The 74LVCH244A-Q100 bus hold on data inputs eliminates the need for external pull-up resistors  
to hold unused inputs.  
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100  
(Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from -40 °C to +85 °C and from -40 °C to +125 °C  
5 V tolerant inputs/outputs for interfacing with 5 V logic  
Wide supply voltage range from 1.2 V to 3.6 V  
CMOS low-power consumption  
Direct interface with TTL levels  
Inputs accept voltages up to 5.5 V  
High-impedance when VCC = 0 V  
Bus hold on all data inputs (74LVCH244A-Q100 only)  
Complies with JEDEC standard:  
JESD8-7A (1.65 V to 1.95 V)  
JESD8-5A (2.3 V to 2.7 V)  
JESD8-C/JESD36 (2.7 V to 3.6 V)  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)  
Multiple package options  
DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of  
solder joints  
 
 

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