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74LVC16374APAG8 PDF预览

74LVC16374APAG8

更新时间: 2024-11-30 01:23:27
品牌 Logo 应用领域
艾迪悌 - IDT 驱动输入元件光电二极管输出元件逻辑集成电路触发器
页数 文件大小 规格书
6页 106K
描述
3.3V CMOS 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP

74LVC16374APAG8 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP, TSSOP48,.3,20针数:48
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.18
其他特性:5V TOLERANT INPUTS AND OUTPUTS系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G48JESD-609代码:e3
长度:12.5 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大频率@ Nom-Sup:150000000 Hz
最大I(ol):0.024 A湿度敏感等级:1
位数:8功能数量:2
端口数量:2端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP48,.3,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:4.5 ns传播延迟(tpd):4.9 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:FF/Latches最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
触发器类型:POSITIVE EDGE宽度:6.1 mm
Base Number Matches:1

74LVC16374APAG8 数据手册

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3.3V CMOS 16-BIT  
EDGE-TRIGGERED D-TYPE  
IDT74LVC16374A  
FLIP-FLOP WITH 3-STATE OUTPUTS,  
5 VOLT TOLERANT I/O  
DESCRIPTION:  
FEATURES:  
The LVC16374A 16-bit edge-triggered D-type flip-flop is built using  
• Typical tSK(o) (Output Skew) < 250ps  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
advanced dual metal CMOS technology. This high-speed, low-power  
register is ideal for use as a buffer register for data synchronization and  
storage. The Output Enable (OE) and clock (CLK) controls are organized  
to operate this device as two 8-bit registers or one 16-bit register with  
commonclock. Flow-throughorganizationofsignalpinssimplifieslayout.  
All inputs are designed with hysteresis for improved noise margin.  
AllpinsoftheLVC16374Acanbedrivenfromeither3.3Vor5Vdevices.  
This feature allows the use of this device as a translator in a mixed 3.3V/  
5V supply system.  
• VCC = 3.3V ± 0.3V, Normal Range  
• VCC = 2.7V to 3.6V, Extended Range  
• CMOS power levels (0.4μ W typ. static)  
• All inputs, outputs, and I/O are 5V tolerant  
• Supports hot insertion  
• Available in TSSOP package  
DRIVE FEATURES:  
• High Output Drivers: ±24mA  
• Reduced system switching noise  
The LVC16374A has been designed with a ±24mA output driver. This  
driver is capable of driving a moderate to heavy load while maintaining  
speedperformance.  
APPLICATIONS:  
• 5V and 3.3V mixed voltage systems  
• Data communication and telecommunication systems  
FUNCTIONALBLOCKDIAGRAM  
1
24  
2OE  
1OE  
48  
25  
2CLK  
1CLK  
47  
36  
D
D
2D1  
1D1  
2
13  
C
2Q1  
C
1Q1  
TO SEVEN OTHER CHANNELS  
TO SEVEN OTHER CHANNELS  
IDTandtheIDTlogoareregisteredtrademarksofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
AUGUST 2015  
1
© 2015 Integrated Device Technology, Inc.  
DSC-4752/6  

74LVC16374APAG8 替代型号

型号 品牌 替代类型 描述 数据表
74LVC16374APAG IDT

完全替代

3.3V CMOS 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP
SN74LVC16374ADLR TI

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16 BIT EDGE TRIGGERED D TYPE FLIP FLOP WITH 3 STATE OUTPUTS
SN74LVC16374ADGGR TI

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16 BIT EDGE TRIGGERED D TYPE FLIP FLOP WITH 3 STATE OUTPUTS

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