Datasheet > 74LVC16374APV

74LVC16374APV

更新时间： 2024-09-15 03:49:15

品牌	Logo	应用领域
艾迪悌 - IDT		光电二极管
页数	文件大小	规格书
6页	430K
描述
Bus Driver, LVC/LCX/Z Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, SSOP-48

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74LVC16374APV 数据手册

IDT74LVC16374A

3.3VCMOS16-BITEDGE-TRIGGEREDD-TYPEFLIP-FLOP

INDUSTRIALTEMPERATURERANGE

3.3V CMOS 16-BIT

EDGE-TRIGGERED D-TYPE

IDT74LVC16374A

FLIP-FLOP WITH 3-STATE OUTPUTS,

5 VOLT TOLERANT I/O

DESCRIPTION:

FEATURES:

The LVC16374A 16-bit edge-triggered D-type flip-flop is built using

• Typical tSK(o) (Output Skew) < 250ps

• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using

machine model (C = 200pF, R = 0)

advanced dual metal CMOS technology. This high-speed, low-power

storage. The OutputEnable (OE)andclock(CLK)controls are organized

to operate this device as two 8-bit registers or one 16-bit register with

commonclock. Flow-throughorganizationofsignalpins simplifies layout.

Allinputs are designedwithhysteresis forimprovednoise margin.

Allpins oftheLVC16374Acanbedrivenfromeither3.3Vor5Vdevices.

This feature allows the use of this device as a translator in a mixed 3.3V/

5Vsupplysystem.

• VCC = 3.3V ± 0.3V, Normal Range

• VCC = 2.7V to 3.6V, Extended Range

• CMOS power levels (0.4μ W typ. static)

• All inputs, outputs, and I/O are 5V tolerant

• Supports hot insertion

• Available in SSOP, TSSOP, and TVSOP packages

DRIVE FEATURES:

• High Output Drivers: ±24mA

• Reduced system switching noise

The LVC16374A has been designed with a ±24mA output driver. This

driver is capable of driving a moderate to heavy load while maintaining

speedperformance.

APPLICATIONS:

• 5V and 3.3V mixed voltage systems

• Data communication and telecommunication systems

FUNCTIONALBLOCKDIAGRAM

2OE

1OE

2CLK

1CLK

2D1

1D1

2Q1

1Q1

TO SEVEN OTHER CHANNELS

TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.

INDUSTRIAL TEMPERATURE RANGE

OCTOBER 2008

DSC-4752/5

12 3 4 5 6

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