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74LCX138MTR PDF预览

74LCX138MTR

更新时间: 2024-11-03 21:55:11
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 解码器驱动器逻辑集成电路光电二极管输入元件
页数 文件大小 规格书
12页 303K
描述
LOW VOLTAGE CMOS 3 TO 8 LINE DECODER (INV) WITH 5V TOLERANT INPUTS

74LCX138MTR 技术参数

是否无铅: 不含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP16,.25针数:16
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.09
Is Samacsys:N系列:LVC/LCX/Z
输入调节:STANDARDJESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:9.9 mm
逻辑集成电路类型:OTHER DECODER/DRIVER最大I(ol):0.024 A
湿度敏感等级:3功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:6.7 ns传播延迟(tpd):7.9 ns
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:Decoder/Drivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):2.7 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:3.9 mmBase Number Matches:1

74LCX138MTR 数据手册

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74LCX138  
LOW VOLTAGE CMOS 3 TO 8 LINE DECODER (INV.)  
WITH 5V TOLERANT INPUTS  
5V TOLERANT INPUTS  
HIGH SPEED:  
= 6.7ns (MAX.) at V = 3V  
t
PD  
CC  
POWER DOWN PROTECTION ON INPUTS  
AND OUTPUTS  
SYMMETRICAL OUTPUT IMPEDANCE:  
SOP  
TSSOP  
|I | = I = 24mA (MIN) at V = 3V  
OH  
OL  
CC  
PCI BUS LEVELS GUARANTEED AT 24 mA  
BALANCED PROPAGATION DELAYS:  
Table 1: Order Codes  
PACKAGE  
t
t
PLH  
PHL  
OPERATING VOLTAGE RANGE:  
(OPR) = 2.0V to 3.6V (1.5V Data  
T & R  
V
CC  
SOP  
74LCX138MTR  
74LCX138TTR  
Retention)  
TSSOP  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 138  
LATCH-UP PERFORMANCE EXCEEDS  
500mA (JESD 17)  
ESD PERFORMANCE:  
HBM > 2000V (MIL STD 883 method 3015);  
MM > 200V  
go low. If enable input G1 is held low or either G2A  
or G2B is held high, the decoding function is  
inhibited and all the 8 outputs go to high.  
Three enable inputs are provided to ease cascade  
connection and application of address decoders  
for memory systems.  
It has same speed performance at 3.3V than 5V  
AC/ACT family, combined with a lower power  
consumption.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
DESCRIPTION  
The 74LCX138 is a low voltage CMOS 3 TO 8  
LINE DECODER (INVERTING) fabricated with  
sub-micron silicon gate and double-layer metal  
2
wiring C MOS technology. It is ideal for low power  
and high speed 3.3V applications; it can be  
interfaced to 5V signal environment for inputs.  
If the device is enabled, 3 binary select inputs (A,  
B and C) determine which one of the outputs will  
Figure 1: Pin Connection And IEC Logic Symbols  
Rev. 4  
1/12  
September 2004  

74LCX138MTR 替代型号

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MC74LCX138DR2G ONSEMI

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