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SN74LVC138AD PDF预览

SN74LVC138AD

更新时间: 2024-11-03 22:34:35
品牌 Logo 应用领域
德州仪器 - TI 解码器驱动器解复用器逻辑集成电路光电二极管输入元件PC
页数 文件大小 规格书
9页 146K
描述
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

SN74LVC138AD 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOIC-16针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:0.9Samacsys Confidence:3
Samacsys Status:ReleasedSamacsys PartID:526045
Samacsys Pin Count:16Samacsys Part Category:Integrated Circuit
Samacsys Package Category:Small Outline PackagesSamacsys Footprint Name:D (R-PDSO-G16)
Samacsys Released Date:2017-01-12 12:59:53Is Samacsys:N
其他特性:TWO ACTIVE-LOW AND ONE ACTIVE-HIGH ENABLE INPUTS系列:LVC/LCX/Z
输入调节:STANDARDJESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:9.9 mm
负载电容(CL):50 pF逻辑集成电路类型:OTHER DECODER/DRIVER
最大I(ol):0.024 A湿度敏感等级:1
位数:8功能数量:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TUBE
峰值回流温度(摄氏度):260电源:3.3 V
最大电源电流(ICC):0.01 mAProp。Delay @ Nom-Sup:6.7 ns
传播延迟(tpd):22 ns认证状态:Not Qualified
座面最大高度:1.75 mm子类别:Decoder/Drivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.9 mm
Base Number Matches:1

SN74LVC138AD 数据手册

 浏览型号SN74LVC138AD的Datasheet PDF文件第2页浏览型号SN74LVC138AD的Datasheet PDF文件第3页浏览型号SN74LVC138AD的Datasheet PDF文件第4页浏览型号SN74LVC138AD的Datasheet PDF文件第5页浏览型号SN74LVC138AD的Datasheet PDF文件第6页浏览型号SN74LVC138AD的Datasheet PDF文件第7页 
SN54LVC138A, SN74LVC138A  
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS  
SCAS291I – MARCH 1993 – REVISED OCTOBER 1998  
SN54LVC138A . . . J OR W PACKAGE  
SN74LVC138A . . . D, DB, OR PW PACKAGE  
(TOP VIEW)  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
V
A
B
C
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC  
Y0  
Y1  
Y2  
Y3  
Y4  
Y5  
Y6  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
G2A  
G2B  
G1  
Y7  
GND  
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
OLP  
= 3.3 V, T = 25°C  
CC  
A
Typical V  
> 2 V at V  
(Output V  
Undershoot)  
OHV  
CC  
OH  
= 3.3 V, T = 25°C  
A
Inputs Accept Voltages to 5.5 V  
Package Options Include Plastic  
SN54LVC138A . . . FK PACKAGE  
(TOP VIEW)  
Small-Outline (D), Shrink Small-Outline  
(DB), and Thin Shrink Small-Outline (PW)  
Packages, Ceramic Chip Carriers (FK) and  
Flat (W) Package, and DIPs (J)  
3
2 1 20 19  
18  
Y1  
Y2  
NC  
C
G2A  
NC  
4
5
6
7
8
description  
17  
16  
The SN54LVC138A 3-line to 8-line decoder/  
demultiplexer is designed for 2.7-V to 3.6-V V  
operation and the SN74LVC138A 3-line to 8-line  
decoder/demultiplexer is designed for 1.65-V to  
15 Y3  
14  
9 10 11 12 13  
G2B  
G1  
CC  
Y4  
3.6-V V  
operation.  
CC  
The ’LVC138A devices are designed for high-  
performance memory-decoding or data-routing  
applications requiring very short propagation  
NC – No internal connection  
delay times. In high-performance memory systems, these decoders minimize the effects of system decoding.  
When employed with high-speed memories utilizing a fast enable circuit, the delay times of these decoders and  
the enable time of the memory are usually less than the typical access time of the memory. This means that  
the effective system delay introduced by the decoders is negligible.  
The conditions at the binary-select inputs and the three enable inputs select one of eight output lines. Two  
active-low enable inputs and one active-high enable input reduce the need for external gates or inverters when  
expanding. A 24-line decoder can be implemented without external inverters and a 32-line decoder requires  
only one inverter. An enable input can be used as a data input for demultiplexing applications.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators  
in a mixed 3.3-V/5-V system environment.  
The SN54LVC138A is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74LVC138A is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1998, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN74LVC138AD 替代型号

型号 品牌 替代类型 描述 数据表
SN74LVC138APWT TI

完全替代

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SN74LVC138ADT TI

完全替代

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SN74LVC138ADGVR TI

完全替代

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

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