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74LCX138MX_NL PDF预览

74LCX138MX_NL

更新时间: 2024-11-04 13:04:59
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 解码器解复用器
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12页 408K
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74LCX138MX_NL 数据手册

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March 1995  
Revised February 2004  
74LCX138  
Low Voltage 1-of-8 Decoder/Demultiplexer  
with 5V Tolerant Inputs  
General Description  
Features  
5V tolerant inputs  
The LCX138 is a high-speed 1-of-8 decoder/demultiplexer.  
This device is ideally suited for high-speed memory chip  
select address decoding. The multiple input enables allow  
parallel expansion to a 1-of-24 decoder using just three  
LCX138 devices or a 1-of-32 decoder using four LCX138  
devices and one inverter.  
2.3V to 3.6V VCC specifications provided  
6.0 ns tPD max (VCC = 3.3V), 10 µA ICC max  
Power down high impedance inputs and outputs  
±24 mA output drive (VCC = 3.0V)  
The 74LCX138 is fabricated with advanced CMOS technol-  
ogy to achieve high speed operation while maintaining  
CMOS low power dissipation.  
Implements patented noise/EMI reduction circuitry  
Latch-up performance exceeds 500 mA  
ESD performance:  
Human body model > 2000V  
Machine model > 200V  
Leadless DQFN package  
Ordering Code:  
Package  
Order Number  
Package Description  
Number  
74LCX138M  
(Note 1)  
M16A  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74LCX138SJ  
(Note 1)  
M16D  
74LCX138BQX  
(Note 2)  
MLP016E  
MTC16  
16-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC MO-241,  
2.5 x 3.5mm  
74LCX138MTC  
(Note 1)  
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
Note 1: Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Note 2: DQFN package available in Tape and Reel only.  
© 2004 Fairchild Semiconductor Corporation  
DS012417  
www.fairchildsemi.com  

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