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74LCX126_08 PDF预览

74LCX126_08

更新时间: 2024-11-04 04:37:47
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飞兆/仙童 - FAIRCHILD /
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13页 754K
描述
Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs

74LCX126_08 数据手册

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February 2008  
74LCX126  
Low Voltage Quad Buffer with 5V Tolerant  
Inputs and Outputs  
Features  
General Description  
5V tolerant inputs and outputs  
The LCX126 contains four independent non-inverting  
buffers with 3-STATE outputs. Each output is disabled  
when the associated output-enable (OE) input is LOW.  
The inputs tolerate voltages up to 7V allowing the inter-  
face of 5V systems to 3V systems.  
2.3V–3.6V V specifications provided  
CC  
5.5ns t max. (V = 3.3V), 10µA I max.  
PD  
CC  
CC  
Power down high impedance inputs and outputs  
(1)  
Supports live insertion/withdrawal  
The 74LCX126 is fabricated with an advanced CMOS  
technology to achieve high speed operation while main-  
taining CMOS low power dissipation.  
24mA output drive (V = 3.0V)  
CC  
Implements patented noise/EMI reduction circuitry  
Latch-up performance exceeds JEDEC 78 conditions  
ESD performance:  
– Human body model > 2000V  
– Machine model > 100V  
Leadless DQFN package  
Note:  
1. To ensure the high-impedance state during power up  
or down, OE should be tied to V through a pull-up  
CC  
resistor: the minimum value of the resistor is  
determined by the current-sourcing capability of the  
driver.  
Ordering Information  
Package  
Order Number  
74LCX126M  
Number  
Package Description  
M14A  
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow  
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74LCX126SJ  
M14D  
(2)  
74LCX126BQX  
MLP14A  
14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC  
MO-241, 2.5 x 3.0mm  
74LCX126MTC  
MTC14  
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm  
Wide  
Note:  
2. DQFN package available in Tape and Reel only.  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.  
All packages are lead free per JEDEC: J-STD-020B standard.  
©2000 Fairchild Semiconductor Corporation  
74LCX126 Rev. 1.5.0  
www.fairchildsemi.com  

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