5秒后页面跳转
74HC2G32DC-Q100 PDF预览

74HC2G32DC-Q100

更新时间: 2024-11-26 11:12:35
品牌 Logo 应用领域
安世 - NEXPERIA 光电二极管逻辑集成电路
页数 文件大小 规格书
12页 206K
描述
Dual 2-input OR gateProduction

74HC2G32DC-Q100 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:VSSOP-8Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.65
系列:HC/UHJESD-30 代码:R-PDSO-G8
JESD-609代码:e4长度:2.3 mm
逻辑集成电路类型:OR GATE湿度敏感等级:1
功能数量:2输入次数:2
端子数量:8最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:VSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
传播延迟(tpd):110 ns筛选级别:AEC-Q100
座面最大高度:1 mm最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:2 mmBase Number Matches:1

74HC2G32DC-Q100 数据手册

 浏览型号74HC2G32DC-Q100的Datasheet PDF文件第2页浏览型号74HC2G32DC-Q100的Datasheet PDF文件第3页浏览型号74HC2G32DC-Q100的Datasheet PDF文件第4页浏览型号74HC2G32DC-Q100的Datasheet PDF文件第5页浏览型号74HC2G32DC-Q100的Datasheet PDF文件第6页浏览型号74HC2G32DC-Q100的Datasheet PDF文件第7页 
74HC2G32-Q100;  
74HCT2G32-Q100  
Dual 2-input OR gate  
Rev. 3 — 8 February 2019  
Product data sheet  
1. General description  
The 74HC2G32-Q100; 74HCT2G32-Q100 is a dual 2-input OR gate. Inputs include clamp diodes  
that enable the use of current limiting resistors to interface inputs to voltages in excess of VCC  
.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100  
(Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from -40 °C to +85 °C and from -40 °C to +125 °C  
Wide supply voltage range from 2.0 V to 6.0 V  
Input levels:  
For 74HC2G32-Q100: CMOS level  
For 74HCT2G32-Q100: TTL level  
Complies with JEDEC standard no. 7A  
Symmetrical output impedance  
High noise immunity  
Low power dissipation  
Balanced propagation delays  
ESD protection:  
MIL-STD-883, method 3015 exceeds 2000 V  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)  
3. Ordering information  
Table 1. Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74HC2G32DP-Q100  
74HCT2G32DP-Q100  
74HC2G32DC-Q100  
74HCT2G32DC-Q100  
-40 °C to +125 °C  
TSSOP8  
plastic thin shrink small outline package; 8 leads; SOT505-2  
body width 3 mm; lead length 0.5 mm  
-40 °C to +125 °C  
VSSOP8  
plastic very thin shrink small outline package;  
8 leads; body width 2.3 mm  
SOT765-1  
 
 
 

与74HC2G32DC-Q100相关器件

型号 品牌 获取价格 描述 数据表
74HC2G32DP NXP

获取价格

Dual 2-input OR gate
74HC2G32DP NEXPERIA

获取价格

Dual 2-input OR gateProduction
74HC2G32DP-Q100 NXP

获取价格

IC OR GATE, Gate
74HC2G32DP-Q100 NEXPERIA

获取价格

Dual 2-input OR gateProduction
74HC2G32GD NXP

获取价格

Dual 2-input OR gate
74HC2G32GD,125 NXP

获取价格

74HC(T)2G32 - Dual 2-input OR gate SON 8-Pin
74HC2G34 NXP

获取价格

Dual buffer gate
74HC2G34GV NXP

获取价格

Dual buffer gate
74HC2G34GV NEXPERIA

获取价格

Dual buffer gateProduction
74HC2G34GV,125 NXP

获取价格

74HC(T)2G34 - Dual buffer gate TSOP 6-Pin