Datasheet > 74HC259BQ,115

74HC259BQ,115

更新时间： 2024-02-05 13:15:52

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
22页	160K
描述
暂无描述

阅读下载

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

74HC259BQ,115 数据手册

74HC259; 74HCT259

NXP Semiconductors

8-bit addressable latch

Table 8.

Dynamic characteristics …continued

Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 12.

Symbol Parameter

Conditions

25 C

Min Typ^[1]Max

40 C to +85 C 40 C to +125 C Unit

Min

Max

Min

Max

t_su

set-up time

D, An to LE;

see Figure 10 and

Figure 11

V_CC= 2.0 V

V_CC= 4.5 V

V_CC= 6.0 V

100

120

t_h

hold time

D to LE; see Figure 10

and Figure 11

V_CC= 2.0 V

V_CC= 4.5 V

V_CC= 6.0 V

19

6

5

An to LE; see Figure 10

and Figure 11

V_CC= 2.0 V

V_CC= 4.5 V

V_CC= 6.0 V

11

4

3

[4]

C_PD

power

f_i= 1 MHz;

dissipation

capacitance

V_I= GND to V_CC

74HCT259

[2]

t_pd

propagation

delay

D to Qn; see Figure 6

V_CC= 4.5 V

V_CC= 5.0 V; C_L= 15 pF

An to Qn; see Figure 7

V_CC= 4.5 V

V_CC= 5.0 V; C_L= 15 pF

LE to Qn; see Figure 8

V_CC= 4.5 V

V_CC= 5.0 V; C_L= 15 pF

t_PHL

HIGH to LOW MR to Qn; see Figure 9

propagation

delay

V_CC= 4.5 V

V_CC= 5.0 V; C_L= 15 pF

[3]

t_t

transition time see Figure 8

V_CC= 4.5 V

t_W

pulse width

LE HIGH or LOW;

see Figure 8

V_CC= 4.5 V

MR LOW; see Figure 9

V_CC= 4.5 V

74HC_HCT259

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 5 — 7 August 2012

9 of 22

1...6 7 8910 11 12...22

下载PDF

与74HC259BQ,115相关器件

型号	品牌	描述	获取价格	数据表
74HC259BQ-Q100	NXP	8-bit addressable latch	获取价格
74HC259BQ-Q100	NEXPERIA	8-bit addressable latchProduction	获取价格
74HC259BQ-Q100,115	NXP	74HC(T)259-Q100 - 8-bit addressable latch QFN 16-Pin	获取价格
74HC259BZ	NEXPERIA	8-bit addressable latchProduction	获取价格
74HC259D	NXP	8-bit addressable latch	获取价格
74HC259D	NEXPERIA	8-bit addressable latchProduction	获取价格