74HC138D,653 PDF预览

74HC138D,653

更新时间: 2025-09-21 19:10:59
品牌 Logo 应用领域
安世 - NEXPERIA /
页数 文件大小 规格书
19页 247K
描述
元器件封装:16-SOIC;

74HC138D,653 技术参数

是否Rohs认证:符合生命周期:Active
零件包装代码:SOP包装说明:3.90 MM, PLASTIC, MS-012, SOT-109-1, SOP-16
针数:16Reach Compliance Code:compliant
HTS代码:8542.39.00.01Factory Lead Time:4 weeks
风险等级:0.47Samacsys Confidence:2
Samacsys Status:ReleasedSamacsys PartID:211966
Samacsys Pin Count:16Samacsys Part Category:Integrated Circuit
Samacsys Package Category:Small Outline PackagesSamacsys Footprint Name:SO16
Samacsys Released Date:2015-05-26 06:40:44Is Samacsys:N
其他特性:3 ENABLE INPUTS系列:HC/UH
输入调节:STANDARDJESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:9.9 mm
负载电容(CL):50 pF逻辑集成电路类型:OTHER DECODER/DRIVER
湿度敏感等级:1功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-40 °C输出极性:INVERTED
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260传播延迟(tpd):225 ns
认证状态:Not Qualified座面最大高度:1.75 mm
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:3.9 mm
Base Number Matches:1

74HC138D,653 数据手册

 浏览型号74HC138D,653的Datasheet PDF文件第2页浏览型号74HC138D,653的Datasheet PDF文件第3页浏览型号74HC138D,653的Datasheet PDF文件第4页浏览型号74HC138D,653的Datasheet PDF文件第5页浏览型号74HC138D,653的Datasheet PDF文件第6页浏览型号74HC138D,653的Datasheet PDF文件第7页 
74HC138; 74HCT138  
3-to-8 line decoder/demultiplexer; inverting  
Rev. 7 — 26 March 2018  
Product data sheet  
1 General description  
The 74HC138; 74HCT138 decodes three binary weighted address inputs  
(A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three  
enable inputs (E1, E2 and E3). Every output will be HIGH unless E1 and E2 are LOW  
and E3 is HIGH. This multiple enable function allows easy parallel expansion to a 1-of-32  
(5 to 32 lines) decoder with just four '138 ICs and one inverter. The '138 can be used  
as an eight output demultiplexer by using one of the active LOW enable inputs as the  
data input and the remaining enable inputs as strobes. Inputs include clamp diodes. This  
enables the use of current limiting resistors to interface inputs to voltages in excess of  
VCC  
.
2 Features and benefits  
Complies with JEDEC standard no. 7A  
Input levels:  
For 74HC138: CMOS level  
For 74HCT138: TTL level  
Demultiplexing capability  
Multiple input enable for easy expansion  
Ideal for memory chip select decoding  
Active LOW mutually exclusive outputs  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
Multiple package options  
Specified from -40 °C to +85 °C and from -40 °C to +125 °C  
 
 

74HC138D,653 替代型号

型号 品牌 替代类型 描述 数据表
74HC138D NEXPERIA

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