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74AVCH16245DGG-T PDF预览

74AVCH16245DGG-T

更新时间： 2024-11-06 21:02:15
品牌 Logo 应用领域
恩智浦 - NXP 光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
16页 131K
描述
IC AVC SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48, 6.10 MM, PLASTIC, SOT-362, TSSOP-48, Bus Driver/Transceiver

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74AVCH16245DGG-T 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Transferred零件包装代码：TSSOP
包装说明：6.10 MM, PLASTIC, SOT-362, TSSOP-48针数：48
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.13系列：AVC
JESD-30 代码：R-PDSO-G48JESD-609代码：e0
长度：12.5 mm逻辑集成电路类型：BUS TRANSCEIVER
位数：8功能数量：2
端口数量：2端子数量：48
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：NOT SPECIFIED传播延迟（tpd）：3.3 ns
认证状态：Not Qualified座面最大高度：1.2 mm
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：1.2 V
标称供电电压 (Vsup)：1.4 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：TIN LEAD端子形式：GULL WING
端子节距：0.5 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：6.1 mm
Base Number Matches：1

74AVCH16245DGG-T 数据手册

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74AVCH16245  
16-bit transceiver with direction pin; 3.6 V tolerant; 3-state  
Rev. 3 — 8 January 2013  
Product data sheet  
1. General description  
The 74AVCH16245 is a 16-bit transceiver featuring non-inverting 3-state bus compatible  
outputs in both send and receive directions. The device features two output enable inputs  
(nOE) for easy cascading and two send/receive inputs (nDIR) for direction control.  
Inputs nOE control the outputs so that the buses are effectively isolated. This device can  
be used as two 8-bit transceivers or one 16-bit transceiver.  
The 74AVCH16245 is designed to have an extremely fast propagation delay and a  
minimum amount of power consumption.  
To ensure the high-impedance output state during power-up or power-down, tie pins nOE  
to VCC through a pull-up resistor (Live Insertion).  
A Dynamic Controlled Output (DCO) circuitry is implemented to support termination line  
drive during transient (see Figure 4 and Figure 5)  
The 74AVCH16245 has active bus-hold circuitry to hold unused or floating data inputs at a  
valid logic level. This feature eliminates the need for external pull-up or pull-down  
resistors.  
2. Features and benefits  
Wide supply voltage range from 1.2 V to 3.6 V  
Complies with JEDEC standards:  
JESD8-7 (1.2 V to 1.95 V)  
JESD8-5 (1.8 V to 2.7 V)  
JESD8-1A (2.7 V to 3.6 V)  
CMOS low power consumption  
Input/output tolerant up to 3.6 V  
Dynamic Controlled Output (DCO) circuit dynamically changes output impedance,  
resulting in noise reduction without speed degradation  
Low inductance multiple VCC and GND pins to minimize noise and ground bounce  
Supports Live Insertion  
All inputs have bus-hold  
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