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74AUP1G18GM PDF预览

74AUP1G18GM

更新时间: 2024-11-05 06:31:51
品牌 Logo 应用领域
恩智浦 - NXP 解复用器
页数 文件大小 规格书
19页 97K
描述
Low-power 1-of-2 demultiplexer with 3-state deselected output

74AUP1G18GM 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Transferred零件包装代码:SON
包装说明:1 X 1.45 MM, 0.50 MM HEIGHT, PLASTIC, MO-252, SOT-886, SON-6针数:6
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.02Is Samacsys:N
系列:AUP/ULP/VJESD-30 代码:R-PDSO-N6
JESD-609代码:e3长度:1.45 mm
负载电容(CL):30 pF逻辑集成电路类型:MULTIPLEXER AND DEMUX/DECODER
最大I(ol):0.0017 A湿度敏感等级:1
功能数量:1输入次数:1
输出次数:2端子数量:6
最高工作温度:125 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:VSON
封装等效代码:SOLCC6,.04,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, VERY THIN PROFILE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):260电源:1.2/3.3 V
Prop。Delay @ Nom-Sup:18.9 ns传播延迟(tpd):18.9 ns
认证状态:Not Qualified座面最大高度:0.5 mm
子类别:Decoder/Drivers最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):0.8 V标称供电电压 (Vsup):1.1 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Tin (Sn)
端子形式:NO LEAD端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:1 mmBase Number Matches:1

74AUP1G18GM 数据手册

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74AUP1G18  
Low-power 1-of-2 demultiplexer with 3-state deselected  
output  
Rev. 02 — 3 April 2008  
Product data sheet  
1. General description  
The 74AUP1G18 is a high-performance, low-power, low-voltage, Si-gate CMOS device,  
superior to most advanced CMOS compatible TTL families.  
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall  
times across the entire VCC range from 0.8 V to 3.6 V. This device ensures a very low  
static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V.  
This device is fully specified for partial Power-down applications using IOFF  
.
The IOFF circuitry disables the output, preventing the damaging backflow current through  
the device when it is powered down.  
The 74AUP1G18 provides a 1-of-2 non-inverting demultiplexer with 3-state output. The  
74AUP1G18 buffers the data on input pin (A) and passes it either to output 1Y or 2Y,  
depending on whether the state of the select input pin (S) is LOW or HIGH.  
2. Features  
I Wide supply voltage range from 0.8 V to 3.6 V  
I High noise immunity  
I Complies with JEDEC standards:  
N JESD8-12 (0.8 V to 1.3 V)  
N JESD8-11 (0.9 V to 1.65 V)  
N JESD8-7 (1.2 V to 1.95 V)  
N JESD8-5 (1.8 V to 2.7 V)  
N JESD8-B (2.7 V to 3.6 V)  
I ESD protection:  
N HBM JESD22-A114E Class 3A exceeds 5000 V  
N MM JESD22-A115-A exceeds 200 V  
N CDM JESD22-C101C exceeds 1000 V  
I Low static power consumption; ICC = 0.9 µA (maximum)  
I Latch-up performance exceeds 100 mA per JESD 78 Class II  
I Inputs accept voltages up to 3.6 V  
I Low noise overshoot and undershoot < 10 % of VCC  
I IOFF circuitry provides partial Power-down mode operation  
I Multiple package options  
I Specified from 40 °C to +85 °C and 40 °C to +125 °C  

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