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74AUP1G19GM-H PDF预览

74AUP1G19GM-H

更新时间: 2024-11-05 20:38:59
品牌 Logo 应用领域
恩智浦 - NXP 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
17页 86K
描述
IC,DECODER/DEMUX,1-TO-2-LINE,CMOS,LLCC,6PIN,PLASTIC

74AUP1G19GM-H 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:SON, SOLCC6,.04,20Reach Compliance Code:unknown
风险等级:5.84JESD-30 代码:R-PDSO-N6
负载电容(CL):30 pF逻辑集成电路类型:OTHER DECODER/DRIVER
最大I(ol):0.0017 A功能数量:1
端子数量:6最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SON封装等效代码:SOLCC6,.04,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
包装方法:TAPE AND REEL电源:1.2/3.3 V
Prop。Delay @ Nom-Sup:21.7 ns认证状态:Not Qualified
子类别:Decoder/Drivers表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子形式:NO LEAD端子节距:0.5 mm
端子位置:DUALBase Number Matches:1

74AUP1G19GM-H 数据手册

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74AUP1G19  
Low-power 1-of-2 decoder/demultiplexer  
Rev. 01 — 13 August 2008  
Product data sheet  
1. General description  
The 74AUP1G19 provides a 1-of-2 decoder/demultiplexer with a common output enable. It  
buffers the data on input pin A and passes it either to output pin 1Y (true) or 2Y  
(complement), depending on whether the state of the enable input pin E is LOW or HIGH,  
respectively.  
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall  
times across the entire VCC range from 0.8 V to 3.6 V.  
This device ensures a very low static and dynamic power consumption across the entire  
VCC range from 0.8 V to 3.6 V.  
This device is fully specified for partial power-down applications using IOFF  
.
The IOFF circuitry disables the output, preventing the damaging backflow current through  
the device when it is powered down.  
2. Features  
I Wide supply voltage range from 0.8 V to 3.6 V  
I High noise immunity  
I Complies with JEDEC standards:  
N JESD8-12 (0.8 V to 1.3 V)  
N JESD8-11 (0.9 V to 1.65 V)  
N JESD8-7 (1.2 V to 1.95 V)  
N JESD8-5 (1.8 V to 2.7 V)  
N JESD8-B (2.7 V to 3.6 V)  
I ESD protection:  
N HBM JESD22-A114E exceeds 5000 V  
N MM JESD22-A115-A exceeds 200 V  
N CDM JESD22-C101-C exceeds 1000 V  
I Low static power consumption; ICC = 0.9 µA (maximum)  
I Latch-up performance exceeds 100 mA per JESD 78 Class II  
I Inputs accept voltages up to 3.6 V  
I Low noise overshoot and undershoot < 10 % of VCC  
I IOFF circuitry provides partial Power-down mode operation  
I Multiple package options  
I Specified from 40 °C to +85 °C and 40 °C to +125 °C  

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