5秒后页面跳转
74AUP1G07GN PDF预览

74AUP1G07GN

更新时间: 2024-01-10 14:22:15
品牌 Logo 应用领域
安世 - NEXPERIA 光电二极管逻辑集成电路
页数 文件大小 规格书
18页 275K
描述
Low-power buffer with open-drain outputProduction

74AUP1G07GN 技术参数

是否Rohs认证:符合生命周期:Transferred
零件包装代码:SON包装说明:SON,
针数:6Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.59
Is Samacsys:N系列:AUP/ULP/V
JESD-30 代码:R-PDSO-N6JESD-609代码:e3
长度:1 mm逻辑集成电路类型:BUFFER
湿度敏感等级:1功能数量:1
输入次数:1端子数量:6
最高工作温度:125 °C最低工作温度:-40 °C
输出特性:OPEN-DRAIN封装主体材料:PLASTIC/EPOXY
封装代码:SON封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
传播延迟(tpd):20.7 ns认证状态:Not Qualified
座面最大高度:0.35 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):0.8 V标称供电电压 (Vsup):1.1 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:TIN
端子形式:NO LEAD端子节距:0.3 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:0.9 mmBase Number Matches:1

74AUP1G07GN 数据手册

 浏览型号74AUP1G07GN的Datasheet PDF文件第1页浏览型号74AUP1G07GN的Datasheet PDF文件第3页浏览型号74AUP1G07GN的Datasheet PDF文件第4页浏览型号74AUP1G07GN的Datasheet PDF文件第5页浏览型号74AUP1G07GN的Datasheet PDF文件第6页浏览型号74AUP1G07GN的Datasheet PDF文件第7页 
Nexperia  
74AUP1G07  
Low-power buffer with open-drain output  
3. Ordering information  
Table 1. Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74AUP1G07GW  
74AUP1G07GM  
74AUP1G07GN  
74AUP1G07GS  
74AUP1G07GX  
-40 °C to +125 °C  
-40 °C to +125 °C  
-40 °C to +125 °C  
-40 °C to +125 °C  
-40 °C to +125 °C  
TSSOP5  
plastic thin shrink small outline package; 5 leads;  
body width 1.25 mm  
SOT353-1  
XSON6  
XSON6  
XSON6  
X2SON5  
plastic extremely thin small outline package;  
no leads; 6 terminals; body 1 × 1.45 × 0.5 mm  
SOT886  
extremely thin small outline package; no leads;  
6 terminals; body 0.9 × 1.0 × 0.35 mm  
SOT1115  
SOT1202  
SOT1226-3  
extremely thin small outline package; no leads;  
6 terminals; body 1.0 × 1.0 × 0.35 mm  
plastic thermal enhanced extremely thin  
small outline package; no leads; 5 terminals;  
body 0.8 × 0.8 × 0.32 mm  
74AUP1G07GX4 -40 °C to +125 °C  
X2SON4  
plastic thermal enhanced extremely thin  
small outline package; no leads; 4 terminals;  
body 0.6 × 0.6 × 0.32 mm  
SOT1269-2  
4. Marking  
Table 2. Marking  
Type number  
Marking code[1]  
74AUP1G07GW  
74AUP1G07GM  
74AUP1G07GN  
74AUP1G07GS  
74AUP1G07GX  
74AUP1G07GX4  
pS  
pS  
pS  
pS  
pS  
pS  
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.  
5. Functional diagram  
Y
A
Y
A
A
Y
GND  
mna623  
mna624  
mna625  
Fig. 1. Logic symbol  
Fig. 2. IEC logic symbol  
Fig. 3. Logic diagram  
©
74AUP1G07  
All information provided in this document is subject to legal disclaimers.  
Nexperia B.V. 2023. All rights reserved  
Product data sheet  
Rev. 11.1 — 11 July 2023  
2 / 18  
 
 
 
 

与74AUP1G07GN相关器件

型号 品牌 描述 获取价格 数据表
74AUP1G07GS NXP Low-power buffer with open-drain output

获取价格

74AUP1G07GS NEXPERIA Low-power buffer with open-drain outputProduction

获取价格

74AUP1G07GW NEXPERIA Low-power buffer with open-drain outputProduction

获取价格

74AUP1G07GW NXP Low-power buffer with open-drain output

获取价格

74AUP1G07GW,125 NXP 74AUP1G07 - Low-power buffer with open-drain output TSSOP 5-Pin

获取价格

74AUP1G07GW-G NXP 暂无描述

获取价格