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74AUP1G07_11 PDF预览

74AUP1G07_11

更新时间: 2022-09-25 09:47:35
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
18页 115K
描述
Low-power buffer with open-drain output

74AUP1G07_11 数据手册

 浏览型号74AUP1G07_11的Datasheet PDF文件第1页浏览型号74AUP1G07_11的Datasheet PDF文件第3页浏览型号74AUP1G07_11的Datasheet PDF文件第4页浏览型号74AUP1G07_11的Datasheet PDF文件第5页浏览型号74AUP1G07_11的Datasheet PDF文件第6页浏览型号74AUP1G07_11的Datasheet PDF文件第7页 
74AUP1G07  
NXP Semiconductors  
Low-power buffer with open-drain output  
3. Ordering information  
Table 1.  
Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74AUP1G07GW  
74AUP1G07GM  
74AUP1G07GF  
74AUP1G07GN  
74AUP1G07GS  
40 C to +125 C  
40 C to +125 C  
40 C to +125 C  
40 C to +125 C  
40 C to +125 C  
TSSOP5  
plastic thin shrink small outline package; 5 leads;  
body width 1.25 mm  
SOT353-1  
XSON6  
XSON6  
XSON6  
XSON6  
plastic extremely thin small outline package; no leads; SOT886  
6 terminals; body 1 1.45 0.5 mm  
plastic extremely thin small outline package; no leads; SOT891  
6 terminals; body 1 1 0.5 mm  
extremely thin small outline package; no leads;  
6 terminals; body 0.9 1.0 0.35 mm  
SOT1115  
SOT1202  
extremely thin small outline package; no leads;  
6 terminals; body 1.0 1.0 0.35 mm  
4. Marking  
Table 2.  
Marking  
Type number  
Marking code[1]  
74AUP1G07GW  
74AUP1G07GM  
74AUP1G07GF  
74AUP1G07GN  
74AUP1G07GS  
pS  
pS  
pS  
pS  
pS  
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.  
5. Functional diagram  
Y
A
Y
4
2
2
4
A
A
Y
GND  
mna623  
mna624  
mna625  
Fig 1. Logic symbol  
Fig 2. IEC logic symbol  
Fig 3. Logic diagram  
74AUP1G07  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2011. All rights reserved.  
Product data sheet  
Rev. 5 — 15 November 2011  
2 of 18  

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