5秒后页面跳转
74AUP1G04 PDF预览

74AUP1G04

更新时间: 2024-01-03 15:52:35
品牌 Logo 应用领域
恩智浦 - NXP 线路驱动器或接收器驱动程序和接口接口集成电路
页数 文件大小 规格书
18页 95K
描述
Low-power inverter

74AUP1G04 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:TSSOP, TSSOP5/6,.08Reach Compliance Code:unknown
风险等级:5.8JESD-30 代码:R-PDSO-G5
JESD-609代码:e0负载电容(CL):30 pF
逻辑集成电路类型:INVERTER最大I(ol):0.0017 A
端子数量:5最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP5/6,.08
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL电源:1.2/3.3 V
Prop。Delay @ Nom-Sup:20.9 ns认证状态:Not Qualified
施密特触发器:NO子类别:Gates
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUALBase Number Matches:1

74AUP1G04 数据手册

 浏览型号74AUP1G04的Datasheet PDF文件第6页浏览型号74AUP1G04的Datasheet PDF文件第7页浏览型号74AUP1G04的Datasheet PDF文件第8页浏览型号74AUP1G04的Datasheet PDF文件第10页浏览型号74AUP1G04的Datasheet PDF文件第11页浏览型号74AUP1G04的Datasheet PDF文件第12页 
74AUP1G04  
NXP Semiconductors  
Low-power inverter  
Table 8.  
Dynamic characteristics …continued  
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8  
Symbol  
Tamb = 25 °C  
CPD  
Parameter  
Conditions  
Min  
Typ [1]  
Max  
Unit  
[2]  
power dissipation capacitance f = 1 MHz; VI = GND to VCC  
VCC = 0.8 V  
-
-
-
-
-
-
2.5  
2.7  
2.8  
3.0  
3.5  
4.0  
-
-
-
-
-
-
pF  
pF  
pF  
pF  
pF  
pF  
VCC = 1.1 V to 1.3 V  
VCC = 1.4 V to 1.6 V  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 3.0 V to 3.6 V  
[1] All typical values are measured at nominal VCC  
.
[2] CPD is used to determine the dynamic power dissipation (PD in µW).  
PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where:  
fi = input frequency in MHz;  
fo = output frequency in MHz;  
CL = output load capacitance in pF;  
VCC = supply voltage in V;  
N = number of inputs switching;  
Σ(CL × VCC2 × fo) = sum of the outputs.  
Table 9.  
Dynamic characteristics  
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8  
Symbol  
Parameter  
Conditions  
40 °C to +85 °C  
40 °C to +125 °C  
Unit  
Min  
Max  
Min  
Max  
CL = 5 pF  
tPHL, tPLH HIGH-to-LOW and see Figure 7  
LOW-to-HIGH  
VCC = 1.1 V to 1.3 V  
2.1  
1.6  
1.4  
1.1  
1.0  
11.4  
7.4  
5.9  
4.5  
3.9  
2.1  
1.6  
1.4  
1.1  
1.0  
12.6  
8.2  
6.5  
5.0  
4.3  
ns  
ns  
ns  
ns  
ns  
propagation delay  
A to Y  
VCC = 1.4 V to 1.6 V  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 3.0 V to 3.6 V  
CL = 10 pF  
tPHL, tPLH HIGH-to-LOW and see Figure 7  
LOW-to-HIGH  
VCC = 1.1 V to 1.3 V  
2.6  
2.1  
1.8  
1.5  
1.4  
13.7  
8.7  
7.0  
5.4  
4.5  
2.6  
2.1  
1.8  
1.5  
1.4  
15.1  
9.6  
7.7  
6.0  
5.0  
ns  
ns  
ns  
ns  
ns  
propagation delay  
A to Y  
VCC = 1.4 V to 1.6 V  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 3.0 V to 3.6 V  
74AUP1G04_3  
© NXP B.V. 2009. All rights reserved.  
Product data sheet  
Rev. 03 — 5 November 2009  
9 of 18  

与74AUP1G04相关器件

型号 品牌 描述 获取价格 数据表
74AUP1G04GF NXP Low-power inverter

获取价格

74AUP1G04GF/S500 NXP AUP/ULP/V SERIES, 1-INPUT INVERT GATE, PDSO6

获取价格

74AUP1G04GM NXP Low-power inverter

获取价格

74AUP1G04GM NEXPERIA Low-power inverterProduction

获取价格

74AUP1G04GM,184 NXP Inverter, AUP/ULP/V Series, 1-Func, 1-Input, CMOS, PDSO6

获取价格

74AUP1G04GM-H NXP IC AUP/ULP/V SERIES, 1-INPUT INVERT GATE, PDSO6, 1 X 1.45 MM, 0.50 MM HEIGHT, PLASTIC, MO-

获取价格