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74ALVCH16843PF8 PDF预览

74ALVCH16843PF8

更新时间: 2024-11-18 14:08:19
品牌 Logo 应用领域
艾迪悌 - IDT 驱动光电二极管逻辑集成电路电视
页数 文件大小 规格书
7页 69K
描述
TVSOP-56, Reel

74ALVCH16843PF8 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:TVSOP
包装说明:TSSOP,针数:56
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.77其他特性:WITH CLEAR AND PRESET
系列:ALVC/VCX/AJESD-30 代码:R-PDSO-G56
JESD-609代码:e0长度:11.3 mm
逻辑集成电路类型:BUS DRIVER湿度敏感等级:1
位数:9功能数量:2
端口数量:2端子数量:56
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):240传播延迟(tpd):3.9 ns
座面最大高度:1.2 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.4 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mmBase Number Matches:1

74ALVCH16843PF8 数据手册

 浏览型号74ALVCH16843PF8的Datasheet PDF文件第2页浏览型号74ALVCH16843PF8的Datasheet PDF文件第3页浏览型号74ALVCH16843PF8的Datasheet PDF文件第4页浏览型号74ALVCH16843PF8的Datasheet PDF文件第5页浏览型号74ALVCH16843PF8的Datasheet PDF文件第6页浏览型号74ALVCH16843PF8的Datasheet PDF文件第7页 
3.3V CMOS 18-BIT  
IDT74ALVCH16843  
BUS-INTERFACE D-TYPE  
LATCH WITH 3-STATE OUT-  
PUTS AND BUS-HOLD  
FEATURES:  
DESCRIPTION:  
• 0.5 MICRON CMOS Technology  
The ALVCH16843 is built using advanced dual metal CMOS technology.  
Thisdevicehastwo9-bitD-typelatchesfeaturingseparateD-typeinputsfor  
eachlatchand3-stateoutputsforbusorientedapplications.Thetwosections  
of each register are controlled independently by the latch enable (LE), clear  
(CLR), preset (PRE) and output enable (OE) control pins.  
• Typical tSK(o) (Output Skew) < 250ps  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
• VCC = 3.3V ± 0.3V, Normal Range  
• VCC = 2.7V to 3.6V, Extended Range  
• VCC = 2.5V ± 0.2V  
• CMOS power levels (0.4µ W typ. static)  
• Rail-to-Rail output swing for increased noise margin  
• Available in SSOP, TSSOP, and TVSOP packages  
When OE is low, the data in the registers appear at the outputs. When OE  
is high, the outputs are in the high impedance OFF state. Operation of the OE  
input does not affect the state of the flip-flops.  
The ALVCH16843 has been designed with a ±24mA output driver. This  
driveriscapableofdrivingamoderatetoheavyloadwhilemaintainingspeed  
performance.  
The ALVCH16843 has “bus-hold” which retains the inputs’ last state  
whenevertheinputbusgoestoahighimpedance.Thispreventsfloatinginputs  
andeliminatestheneedforpull-up/downresistors.  
DRIVE FEATURES:  
• High Output Drivers: ±24mA  
• Suitable for heavy loads  
APPLICATIONS:  
• 3.3V high speed systems  
• 3.3V and lower voltage computing systems  
FUNCTIONALBLOCKDIAGRAM  
1Dx  
2Dx  
D
D
CLR  
PRE  
CR  
PRE  
LE  
LE  
28  
1
2CLR  
1CLR  
55  
30  
2PRE  
1PRE  
29  
56  
2LE  
1LE  
27  
2
2OE  
1OE  
2Qx  
1Qx  
TO EIGHT OTHER CHANNELS  
TO EIGTHER CHANNELS  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
OCTOBER 1999  
1
©1999 Integrated Device Technology, Inc.  
DSC-5154/1  

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