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74ALVCH16244 PDF预览

74ALVCH16244

更新时间: 2024-11-18 05:05:51
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页数 文件大小 规格书
10页 225K
描述
LOW VOLTAGE CMOS 16-BIT BUS BUFFER (3-STATE) WITH 3.6V TOLERANT INPUTS AND OUTPUTS

74ALVCH16244 数据手册

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74ALVCH16244  
LOW VOLTAGE CMOS 16-BIT BUS BUFFER (3-STATE)  
WITH 3.6V TOLERANT INPUTS AND OUTPUTS  
3.6V TOLERANT INPUTS AND OUTPUTS  
HIGH SPEED :  
t
t
t
= 3.0 ns (MAX.) at V = 3.0 to 3.6V  
PD  
PD  
PD  
CC  
= 3.7 ns (MAX.) at V = 2.3 to 2.7V  
CC  
= 5.1 ns (MAX.) at V = 1.65V  
CC  
POWER DOWN PROTECTION ON INPUTS  
AND OUTPUTS  
SYMMETRICAL OUTPUT IMPEDANCE:  
TSSOP  
TUBE  
|I | = I = 24mA (MIN) at V = 3.0V  
OH  
OL  
CC  
|I | = I = 12mA (MIN) at V = 2.3V  
OH  
OL  
CC  
ORDER CODES  
PACKAGE  
|I | = I = 4mA (MIN) at V = 1.65V  
OH  
OL  
CC  
T & R  
OPERATING VOLTAGE RANGE:  
(OPR) = 1.65V to 3.6V  
TSSOP  
74ALVCH16244TTR  
V
CC  
BUS HOLD PROVIDED ON DATA INPUTS  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 16244  
PIN CONNECTION  
LATCH-UP PERFORMANCE EXCEEDS  
300mA (JESD 17)  
ESD PERFORMANCE:  
HBM > 2000V (MIL STD 883 method 3015);  
MM > 200V  
DESCRIPTION  
The 74ALVCH16244 is a low voltage CMOS 16  
BIT BUS BUFFER (NON INVERTED) fabricated  
with sub-micron silicon gate and five-layer metal  
2
wiring C MOS technology. It is ideal for low power  
and very high speed 1.65 to 3.6V applications; it  
can be interfaced to 3.6V signal environment for  
both inputs and outputs.  
Any nG output control governs four BUS  
BUFFERS. Output Enable input (nG) tied together  
gives full 16-bit operation.  
When nG is LOW, the outputs are enabled. When  
nG is HIGH, the output are in high impedance  
state.  
Active bus-hold circuitry is provided to hold  
unused or floating data inputs at a valid logic level.  
This device is designed to be used with 3 state  
memory address drivers, etc.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
February 2003  
1/10  

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