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74ALVCH16244DT PDF预览

74ALVCH16244DT

更新时间: 2024-11-05 20:17:47
品牌 Logo 应用领域
安森美 - ONSEMI 驱动光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
12页 134K
描述
IC ALVC/VCX/A SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PDSO48, TSSOP-48, Bus Driver/Transceiver

74ALVCH16244DT 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP-48
针数:48Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.04
Is Samacsys:N控制类型:ENABLE LOW
系列:ALVC/VCX/AJESD-30 代码:R-PDSO-G48
JESD-609代码:e0长度:12.5 mm
负载电容(CL):30 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.024 A湿度敏感等级:1
位数:4功能数量:4
端口数量:2端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP48,.3,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:RAIL
电源:3.3 VProp。Delay @ Nom-Sup:2.5 ns
传播延迟(tpd):6 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):1.65 V
标称供电电压 (Vsup):1.8 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
宽度:6.1 mmBase Number Matches:1

74ALVCH16244DT 数据手册

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74ALVCH16244  
Low-Voltage 16-Bit Buffer  
with Bus Hold 1.8/2.5/3.3 V  
(3–State, Non–Inverting)  
The 74ALVCH16244 is an advanced performance, non–inverting  
16–bit buffer. It is designed for very high–speed, very low–power  
operation in 1.8 V, 2.5 V or 3.3 V systems.  
http://onsemi.com  
The 74ALVCH16244 is nibble controlled with each nibble  
functioning identically, but independently. The control pins may be  
tied together to obtain full 16–bit operation. The 3–state outputs are  
controlled by an Output Enable (OEn) input for each nibble. When  
OEn is LOW, the outputs are on. When OEn is HIGH, the outputs are  
in the high impedance state. The data inputs include active bushold  
circuitry, eliminating the need for external pull–up resistors to hold  
unused or floating inputs at a valid logic state.  
MARKING DIAGRAM  
48  
48  
74ALVCH16244DT  
AWLYYWW  
1
TSSOP–48  
DT SUFFIX  
CASE 1201  
Designed for Low Voltage Operation: V  
3.6 V Tolerant Inputs and Outputs  
= 1.65 – 3.6 V  
CC  
1
= Assembly Location  
High Speed Operation: 2.5 ns max for 3.0 to 3.6 V  
3.0 ns max for 2.3 to 2.7 V  
A
WL = Wafer Lot  
6.0 ns max for 1.65 to 1.95 V  
YY = Year  
WW = Work Week  
Static Drive:  
±24 mA Drive at 3.0 V  
±18 mA Drive at 2.3 V  
±6 mA Drive at 1.65 V  
Supports Live Insertion and Withdrawal  
ORDERING INFORMATION  
Includes Active Bushold to Hold Unused or Floating Inputs at a Valid  
Logic State  
Device  
Package  
Shipping  
I  
Specification Guarantees High Impedance When V = 0 V  
CC  
OFF  
74ALVCH16244DT  
TSSOP  
39 Units/Rail  
Near Zero Static Supply Current in All Three Logic States (20 µA)  
Substantially Reduces System Power Requirements  
74ALVCH16244DTR TSSOP 2500/Tape & Reel  
Latchup Performance Exceeds ±250 mA @ 125°C  
ESD Performance: Human Body Model >2000 V;  
Machine Model >200 V  
Second Source to Industry Standard 74ALVCH16244  
To ensure the outputs activate in the 3–state condition, the output enable pins  
should be connected to V  
determined by the current sinking capability of the output connected to the OE pin.  
through a pull–up resistor. The value of the resistor is  
CC  
Semiconductor Components Industries, LLC, 2001  
1
Publication Order Number:  
November, 2001 – Rev. 0  
74ALVCH16244/D  

74ALVCH16244DT 替代型号

型号 品牌 替代类型 描述 数据表
74ALVC16244MTDX ONSEMI

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74ALVC16244MTD ONSEMI

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IDT74ALVC16244APAG IDT

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Bus Driver, ALVC/VCX/A Series, 4-Func, 4-Bit, True Output, CMOS, PDSO48, GREEN, TSSOP-48

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