Datasheet > 74ALVCH16240DT

74ALVCH16240DT

更新时间： 2024-11-17 23:24:07

品牌	Logo	应用领域
其他 - ETC		逻辑集成电路光电二极管驱动
页数	文件大小	规格书
12页	140K
描述
BUFFER/DRIVER\|QUAD\|4-BIT\|AVC/ALVC-CMOS\|TSSOP\|48PIN\|PLASTIC

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74ALVCH16240DT 数据手册

74ALVCH16240

Low-Voltage 16-Bit Buffer

with Bus Hold 1.8/2.5/3.3 V

(3–State, Inverting)

The 74ALVCH16240 is an advanced performance, inverting 16–bit

buffer. It is designed for very high–speed, very low–power operation

in 1.8 V, 2.5 V or 3.3 V systems.

http://onsemi.com

MARKING DIAGRAM

The 74ALVCH16240 is nibble controlled with each nibble

functioning identically, but independently. The control pins may be

tied together to obtain full 16–bit operation. The 3–state outputs are

controlled by an Output Enable (OEn) input for each nibble. When

OEn is LOW, the outputs are on. When OEn is HIGH, the outputs are

in the high impedance state. The data inputs include active bus–hold

circuitry, eliminating the need for external pull–up resistors to hold

unused or floating inputs at a valid logic state.

74ALVCH16240DT

AWLYYWW

TSSOP–48

DT SUFFIX

CASE 1201

• Designed for Low Voltage Operation: V

• 3.6 V Tolerant Inputs and Outputs

= 1.65 to 3.6 V

• High–Speed Operation: 2.5 ns Max for 3.0 to 3.6 V

3.0 ns Max for 2.3 to 2.7 V

= Assembly Location

WL = Wafer Lot

YY = Year

6.0 ns Max for 1.65 to 1.95 V

• Static Drive: ±24 mA Drive at 3.0 V

±12 mA Drive at 2.3 V

WW = Work Week

±4 mA Drive at 1.65 V

• Supports Live Insertion and Withdrawal

• Includes Active Bus–Hold to Hold Unused or Floating Inputs at a

Valid Logic State

ORDERING INFORMATION

Device

Package

Shipping

39 / Rail

74ALVCH16240DT

74ALVCH16240DTR

TSSOP

• I

Specification Guarantees High Impedance When V = 0 V†

OFF

• Near Zero Static Supply Current in All Three Logic States (20 mA)

Substantially Reduces System Power Requirements

2500 / Reel

• Latchup Performance Exceeds ±250 mA @ 85_C

• ESD Performance: Human Body Model >2000 V;

Machine Model u200 V

• Second Source to Industry Standard 74ALVCH16240

†To ensure the outputs activate in the 3–state condition, the output enable pins

should be connected to V

determined by the current sinking capability of the output connected to the OE pin.

through a pull–up resistor. The value of the resistor is

Semiconductor Components Industries, LLC, 2001

Publication Order Number:

November, 2001 – Rev. 1

74ALVCH16240/D

12 3 4 5 6 7...12

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与74ALVCH16240DT相关器件

型号	品牌	获取价格	描述	数据表
74ALVCH16240DTR	ETC	获取价格	BUFFER/DRIVER\|QUAD\|4-BIT\|AVC/ALVC-CMOS\|TSSOP\|48PIN\|PLASTIC
74ALVCH16240MTD	FAIRCHILD	获取价格	Bus Driver, ALVC/VCX/A Series, 4-Func, 4-Bit, Inverted Output, CMOS, PDSO48, 6.10 MM, MO-1
74ALVCH16240MTDX	FAIRCHILD	获取价格	Bus Driver, ALVC/VCX/A Series, 4-Func, 4-Bit, Inverted Output, CMOS, PDSO48, 6.10 MM, MO-1
74ALVCH16240PA	IDT	获取价格	TSSOP-48, Tube
74ALVCH16240PV	IDT	获取价格	SSOP-48, Tube
74ALVCH16240T	FAIRCHILD	获取价格	Low Voltage 16-Bit Inverting Buffer/Line Driver with Bushold
74ALVCH16240T	STMICROELECTRONICS	获取价格	ALVC/VCX/A SERIES, 16 1-BIT DRIVER, INVERTED OUTPUT, PDSO48, TSSOP-48
74ALVCH16240TX	FAIRCHILD	获取价格	BUFFER/DRIVER\|QUAD\|4-BIT\|AVC/ALVC-CMOS\|TSSOP\|48PIN\|PLASTIC
74ALVCH16241DGG-T	NXP	获取价格	IC ALVC/VCX/A SERIES, QUAD 4-BIT DRIVER, TRUE OUTPUT, PDSO48, Bus Driver/Transceiver
74ALVCH16244	STMICROELECTRONICS	获取价格	LOW VOLTAGE CMOS 16-BIT BUS BUFFER (3-STATE) WITH 3.6V TOLERANT INPUTS AND OUTPUTS

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