5秒后页面跳转
捷配首页

Datasheet > 74ALVCF162835VRG4
74ALVCF162835VRG4 PDF预览

74ALVCF162835VRG4

更新时间： 2024-11-17 14:47:03
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管输出元件逻辑集成电路电视
页数 文件大小 规格书
15页 521K
描述
ALVC/VCX/A SERIES, 18-BIT DRIVER, TRUE OUTPUT, PDSO56, GREEN, PLASTIC, TVSOP-56

阅读下载

中文翻译

获取价格

74ALVCF162835VRG4 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：SSOP
包装说明：TSSOP,针数：56
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.42系列：ALVC/VCX/A
JESD-30 代码：R-PDSO-G56JESD-609代码：e4
长度：11.3 mm逻辑集成电路类型：BUS DRIVER
湿度敏感等级：1位数：18
功能数量：1端口数量：2
端子数量：56最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：260
传播延迟（tpd）：5.9 ns认证状态：Not Qualified
座面最大高度：1.2 mm最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：2.3 V标称供电电压 (Vsup)：2.5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.4 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：4.4 mmBase Number Matches：1

74ALVCF162835VRG4 数据手册

 浏览型号74ALVCF162835VRG4的Datasheet PDF文件第2页浏览型号74ALVCF162835VRG4的Datasheet PDF文件第3页浏览型号74ALVCF162835VRG4的Datasheet PDF文件第4页浏览型号74ALVCF162835VRG4的Datasheet PDF文件第5页浏览型号74ALVCF162835VRG4的Datasheet PDF文件第6页浏览型号74ALVCF162835VRG4的Datasheet PDF文件第7页 
SN74ALVCF162835  
3.3-V CMOS 18-BIT UNIVERSAL BUS DRIVER  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCES397A–JULY 2002–REVISED AUGUST 2004  
FEATURES  
DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
•
Member of the Texas Instruments Widebus™  
Family  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
NC  
NC  
GND  
NC  
•
•
•
•
•
•
Ideal for Use in PC133 Register DIMM  
Typical Output Skew . . . <250 ps  
VCC = 3.3 V ± 0.3 V . . . Normal Range  
VCC = 2.7 V to 3.6 V . . . Extended Range  
VCC = 2.5 V ± 0.2 V  
2
3
Y1  
GND  
Y2  
A1  
GND  
A2  
4
5
6
Y3  
A3  
7
V
CC  
V
CC  
Rail-to-Rail Output Swing for Increased Noise  
Margin  
8
Y4  
Y5  
Y6  
GND  
Y7  
Y8  
A4  
A5  
A6  
GND  
A7  
9
•
•
•
Balanced Output Drivers . . . ±18 mA  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
Low Switching Noise  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
A8  
•
ESD Protection Exceeds JESD 22  
- 2000-V Human-Body Model (A114-A)  
- 200-V Machine Model (A115-A)  
Y9  
A9  
Y10  
Y11  
Y12  
GND  
Y13  
Y14  
Y15  
A10  
A11  
A12  
GND  
A13  
A14  
A15  
- 1000-V Charged-Device Model (C101)  
DESCRIPTION/ORDERING INFORMATION  
This 18-bit universal bus driver is designed for 2.3-V  
to 3.6-V VCC operation.  
V
CC  
V
CC  
Data flow from  
A to Y is controlled by the  
Y16  
Y17  
GND  
Y18  
OE  
A16  
A17  
GND  
A18  
CLK  
GND  
output-enable (OE) input. The device operates in the  
transparent mode when the latch-enable (LE) input is  
high. When LE is low, the A data is latched if the  
clock (CLK) input is held at a high or low logic level. If  
LE is low, the A data is stored in the latch/flip-flop on  
the low-to-high transition of CLK. When OE is high,  
the outputs are in the high-impedance state.  
LE  
NC − No internal connection  
The SN74ALVCF162835 has series damping  
resistors in the device output structure that reduce  
switching noise in 128-MB and 256-MB SDRAM  
modules. Designed with a drive capability of ±18 mA,  
this device is  
a
midway drive between the  
SN74ALVC162835 (±12 mA) and SN74ALVC16835  
(±24 mA).  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
TOP-SIDE MARKING  
Tube  
SN74ALVCF162835DL  
SN74ALVCF162835DLR  
SN74ALVCF162835GR  
SN74ALVCF162835VR  
SSOP - DL  
ALVCF162835  
Tape and reel  
Tape and reel  
Tape and reel  
-40°C to 85°C  
TSSOP - DGG  
TVSOP - DGV  
ALVCF162835  
VF2835  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2002–2004, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...15

中文翻译

下载PDF

74ALVCF162835VRG4 替代型号

型号 品牌 替代类型 描述 数据表
74ALVCF162835VRE4 TI

功能相似

 3.3-V CMOS 18-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS

与74ALVCF162835VRG4相关器件

型号 品牌 获取价格 描述 数据表
74ALVCF322835 FAIRCHILD

获取价格

 		Low Voltage 36-Bit Universal Bus Driver with
74ALVCF322835_04 FAIRCHILD

获取价格

 		Low Voltage 36-Bit Universal Bus Driver with 3.6V Tolerant Outputs and 26ohm Series Resist
74ALVCF322835G FAIRCHILD

获取价格

 		Low Voltage 36-Bit Universal Bus Driver with
74ALVCF322835GX FAIRCHILD

获取价格

 		BUFFER/DRIVER|DUAL|18-BIT|AVC/ALVC-CMOS|BGA|114PIN|PLASTIC
74ALVCH162240 FAIRCHILD

获取价格

 		Low Voltage 16-Bit Inverting Buffer/Line Driv
74ALVCH162240T FAIRCHILD

获取价格

 		Low Voltage 16-Bit Inverting Buffer/Line Driv
74ALVCH162240TX FAIRCHILD

获取价格

 		Quad 4-Bit Buffer/Driver
74ALVCH162244 NXP

获取价格

 		16-bit buffer/line driver with 30ohm termination resistor 3-State
74ALVCH162244 FAIRCHILD

获取价格

 		Low Voltage 16-Bit Buffer/Line Driver with Bu
74ALVCH162244 RENESAS

获取价格

 		3.3V CMOS 16-Bit Buffer/Driver with 3-State Outputs and Bus-Hold

与74ALVCF162835VRG4相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证