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74ALVCH162244PA8 PDF预览

74ALVCH162244PA8

更新时间: 2024-11-17 21:14:15
品牌 Logo 应用领域
艾迪悌 - IDT 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
6页 79K
描述
Bus Driver, ALVC/VCX/A Series, 4-Func, 4-Bit, True Output, CMOS, PDSO48, TSSOP-48

74ALVCH162244PA8 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete包装说明:SOP, TSSOP48,.3,20
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.92控制类型:ENABLE LOW
系列:ALVC/VCX/AJESD-30 代码:R-PDSO-G48
JESD-609代码:e0负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.012 A
湿度敏感等级:1位数:4
功能数量:4端口数量:2
端子数量:48最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE WITH SERIES RESISTOR
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:TSSOP48,.3,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260电源:3.3 V
Prop。Delay @ Nom-Sup:4.2 ns传播延迟(tpd):4.9 ns
认证状态:Not Qualified子类别:Bus Driver/Transceivers
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn85Pb15)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:6Base Number Matches:1

74ALVCH162244PA8 数据手册

 浏览型号74ALVCH162244PA8的Datasheet PDF文件第2页浏览型号74ALVCH162244PA8的Datasheet PDF文件第3页浏览型号74ALVCH162244PA8的Datasheet PDF文件第4页浏览型号74ALVCH162244PA8的Datasheet PDF文件第5页浏览型号74ALVCH162244PA8的Datasheet PDF文件第6页 
3.3V CMOS 16-BIT  
IDT74ALVCH162244  
BUFFER/DRIVER WITH  
3-STATE OUTPUTS  
AND BUS-HOLD  
FEATURES:  
DESCRIPTION:  
• 0.5 MICRON CMOS Technology  
This 16-bit buffer/driver is built using advanced dual metal CMOS  
technology. The ALVCH162244 is designed specifically to improve the  
performance and density of 3-state memory address drivers, clock  
drivers, and bus-oriented receivers and transmitters. The device can be  
usedasfour4-bitbuffers,two8-bitbuffers,orone16-bitbuffer.Itprovides  
trueoutputsandsymmetricalactive-low output-enable(OE) inputs.  
The ALVCH162244 has series resistors in the device output structure  
which will significantly reduce line noise when used with light loads. This  
driver has been designed to drive ±12mA at the designated threshold  
levels.  
• Typical tSK(o) (Output Skew) < 250ps  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
• VCC = 3.3V ± 0.3V, Normal Range  
• VCC = 2.7V to 3.6V, Extended Range  
• VCC = 2.5V ± 0.2V  
• CMOS power levels (0.4µ W typ. static)  
• Rail-to-Rail output swing for increased noise margin  
• Available in SSOP, TSSOP, and TVSOP packages  
The ALVCH162244 has “bus-hold” which retains the inputs’ last state  
whenevertheinputbusgoestoahighimpedance. Thispreventsfloating  
inputs and eliminates the need for pull-up/down resistors.  
DRIVE FEATURES:  
• Balanced Output Drivers: ±12mA  
• Low switching noise  
APPLICATIONS:  
• 3.3V high speed systems  
• 3.3V and lower voltage computing systems  
FUNCTIONALBLOCKDIAGRAM  
25  
1
1OE  
3OE  
13  
36  
47  
2
1A1  
3A1  
1Y1  
1Y2  
1Y3  
1Y4  
3Y1  
3Y2  
3Y3  
3Y4  
3
5
35  
33  
32  
46  
44  
14  
16  
1A2  
1A3  
3A2  
3A3  
3A4  
43  
48  
6
17  
1A4  
24  
2OE  
2A1  
4OE  
4A1  
30  
29  
27  
26  
41  
40  
38  
8
9
19  
2Y1  
2Y2  
2Y3  
2Y4  
4Y1  
4Y2  
4Y3  
4Y4  
20  
22  
23  
2A2  
2A3  
4A2  
4A3  
11  
12  
37  
2A4  
4A4  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
MARCH 1999  
1
© 1999 Integrated Device Technology, Inc.  
DSC-4562/2  

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