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74ALVCH162373

更新时间： 2024-11-17 22:56:19

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		锁存器
页数	文件大小	规格书
6页	98K
描述
Low Voltage 16-Bit Transparent Latch with Bushold and 26з Series Resistors in Outputs

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中文翻译

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数据手册

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74ALVCH162373 数据手册

November 2001

Revised November 2001

74ALVCH162373

Low Voltage 16-Bit Transparent Latch with Bushold

and 26Ω Series Resistors in Outputs

General Description

Features

■ 1.65V to 3.6V V_CCsupply operation

The ALVCH162373 contains sixteen non-inverting latches

with 3-STATE outputs and is intended for bus oriented

applications. The device is byte controlled. The flip-flops

appear to be transparent to the data when the Latch enable

(LE) is HIGH. When LE is LOW, the data that meets the

setup time is latched. Data appears on the bus when the

Output Enable (OE) is LOW. When OE is HIGH, the out-

puts are in a high impedance state.

■ 3.6V tolerant control inputs and outputs

■ Bushold on data inputs eliminates the need for external

pull-up/pull-down resistors

■ 26Ω series resistors in outputs

■ t_PD(I_nto O_n)

3.8 ns max for 3.0V to 3.6V V_CC

5.0 ns max for 2.3V to 2.7V V_CC

9.0 ns max for 1.65V to 1.95V V_CC

The ALVCH162373 data inputs include active bushold cir-

cuitry, eliminating the need for external pull-up resistors to

hold unused or floating data inputs at a valid logic level.

The ALVCH162373 is also designed with 26Ω series resis-

tors in the outputs. This design reduces line noise in appli-

cations such as memory address driver, clock drivers and

bus transceivers/transmitters.

■ Uses patented noise/EMI reduction circuitry

■ Latchup conforms to JEDEC JED78

■ ESD performance:

Human body model > 2000V

The 74ALVCH162373 is designed for low voltage (1.65V to

3.6V) V_CCapplications with output compatibility up to 3.6V.

Machine model > 200V

The 74ALVCH162373 is fabricated with an advanced

CMOS technology to achieve high speed operation while

maintaining low CMOS power dissipation.

Ordering Code:

Ordering Number Package Number

Package Description

74ALVCH162373T

MTD48

48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol

Pin Descriptions

Pin Names

Description

OE_n

LE_n

Output Enable Input (Active LOW)

Latch Enable Input

Bushold Inputs

I₀–I₁₅

O₀–O₁₅

Outputs

DS500708

www.fairchildsemi.com

12 3 4 5 6

中文翻译

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与74ALVCH162373相关器件

型号	品牌	获取价格	描述	数据表
74ALVCH162373DLG4	TI	获取价格	16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS
74ALVCH162373GRE4	TI	获取价格	16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS
74ALVCH162373GRG4	TI	获取价格	16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS
74ALVCH162373LRG4	TI	获取价格	16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS
74ALVCH162373PA	IDT	获取价格	Bus Driver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, TSSOP-48
74ALVCH162373PAG	IDT	获取价格	3.3V CMOS 16-BIT TRANS- PARENT D-TYPE LATCH
74ALVCH162373PAG8	IDT	获取价格	3.3V CMOS 16-BIT TRANS- PARENT D-TYPE LATCH
74ALVCH162373PV	IDT	获取价格	Bus Driver, ALVC/VCX/A Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, SSOP-48
74ALVCH162373PVG	IDT	获取价格	3.3V CMOS 16-BIT TRANS- PARENT D-TYPE LATCH
74ALVCH162373PVG8	IDT	获取价格	3.3V CMOS 16-BIT TRANS- PARENT D-TYPE LATCH

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