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74ALVCF322835 PDF预览

74ALVCF322835

更新时间: 2024-11-16 22:36:07
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 总线驱动器
页数 文件大小 规格书
8页 164K
描述
Low Voltage 36-Bit Universal Bus Driver with 3.6V Tolerant Outputs and 26з Series Resistors in Outputs

74ALVCF322835 数据手册

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May 2002  
Revised May 2002  
74ALVCF322835  
Low Voltage 36-Bit Universal Bus Driver  
with 3.6V Tolerant Outputs  
and 26Series Resistors in Outputs  
General Description  
The 74ALVCF322835 low voltage 36-bit universal bus  
driver combines D-type latches and D-type flip-flops to  
allow data flow in transparent, latched and clocked modes.  
Features  
Compatible with PC133 DIMM module specifications  
1.65V to 3.6V VCC specifications provided  
3.6V tolerant outputs  
Data flow is controlled by output-enable (OE), latch-enable  
(LE), and clock (CLK) inputs. The device operates in  
Transparent Mode when LE is held HIGH. The device  
operates in clocked mode when LE is LOW and CLK is tog-  
gled. Data transfers from the Inputs (In) to Outputs (On) on  
26series resistors in outputs  
tPD (CLK to On)  
3.7 ns max for 3.0V to 3.6V VCC  
4.6 ns max for 2.3V to 2.7V VCC  
7.4 ns max for 1.65V to 1.95V VCC  
a Positive Edge Transition of the Clock. When OE is LOW,  
the output data is enabled. When OE is HIGH the output  
port is in a high impedance state.  
Power-down high impedance outputs  
Latchup conforms to JEDEC JED78  
ESD performance:  
The 74ALVCF322835 is designed with 26series resistors  
in the outputs. This design reduces noise in applications  
such as memory address drivers, clock drivers, and bus  
transceivers/transmitters.  
Human body model > 2000V  
Machine model >200V  
The 74ALVCF322835 is designed for low voltage (1.65V to  
3.6V) VCC applications with I/O capability up to 3.6V.  
The 74ALVCF322835 is fabricated with an advanced  
CMOS technology to achieve high speed operation while  
maintaining low CMOS power dissipation.  
Ordering Code:  
Package  
Order Number  
Package Description  
Number  
74ALVCF322835G  
(Note 1) (Note 2)  
BGA114A  
114-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide  
Note 1: Ordering Code “G” indicates Trays.  
Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
© 2002 Fairchild Semiconductor Corporation  
DS500741  
www.fairchildsemi.com  

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